Attention is currently required from: Shelley Chen, Ravi kumar, Sudheer Amrabadi, mturney mturney. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50586 )
Change subject: drivers: spi_flash: Addressing mode change for SPI NOR ......................................................................
Patch Set 111:
(4 comments)
File src/drivers/spi/Kconfig:
https://review.coreboot.org/c/coreboot/+/50586/comment/c5075ecf_9b52fca6 PS111, Line 164: config SPI_FLASH_WINBOND_MODE3 Please remove your previous code that is no longer used.
https://review.coreboot.org/c/coreboot/+/50586/comment/4c147ffb_c9f7393c PS111, Line 181: Exit 4 byte addressing mode for SPI nor. "This will send an Exit 4-Byte Address Mode (E9h) command before the first access to the SPI flash. On some platforms with SPI flashes larger than 32MB, the SPI flash may power up in 4-byte addressing mode and this command needs to be sent before coreboot's 3-byte address commands can be interpreted correctly. On flashes that don't support 4-byte addressing mode or where it is already disabled, this command should be a no-op."
File src/drivers/spi/spi_flash.c:
https://review.coreboot.org/c/coreboot/+/50586/comment/b0821cab_1036d2a2 PS111, Line 15: #define CMD_EXIT_4BYTE_ADDR_MODE 0xe9 Please define this in spi_flash_internal.h with the rest of the commands.
https://review.coreboot.org/c/coreboot/+/50586/comment/e6bc62e0_b0e30a7f PS111, Line 521: #if (CONFIG(SPI_FLASH_EXIT_4_BYTE_ADDR_MODE) && ENV_INITIAL_STAGE) This can be if(), not #if