Change in coreboot[master]: soc/intel/common: Add description for macros

[Sridhar Siricilla (Code Review)]

Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38248 )

Change subject: soc/intel/common: Add description for macros
......................................................................

soc/intel/common: Add description for macros

Below changes are done in the patch:
1. Remove unnecessary lining, and replace spaces with tabs
2. Add description for macros
3. Correct comment mentioned for wrapper #ifndef

TEST=Build and Boot hatch board

Change-Id: I630446234321e7998ab42f8506a58b16e9ce4eb0
Signed-off-by: Sridhar Siricilla 
---
M src/soc/intel/common/block/include/intelblocks/cse.h
1 file changed, 9 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/38248/1

diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h
index b4bfe68..5b6fb25 100644
--- a/src/soc/intel/common/block/include/intelblocks/cse.h
+++ b/src/soc/intel/common/block/include/intelblocks/cse.h
@@ -105,7 +105,6 @@
  */
 bool is_cse_enabled(void);

-
 /* Makes the host ready to communicate with CSE*/
 void set_host_ready(void);

@@ -135,18 +134,20 @@
  */
 int send_hmrfpo_get_status_msg(void);

+/* Fixed MEI Header's Host Address field value */
+#define BIOS_HOST_ADDR	0x00

-#define BIOS_HOST_ADDR							0x00
-#define HECI_MKHI_ADDR							0x07
+/* Fixed MEI Header's ME Address field value */
+#define HECI_MKHI_ADDR	0x07

/* Command GLOBAL_RESET_REQ Reset Types */
-#define GLOBAL_RESET       1
-#define HOST_RESET_ONLY    2
-#define CSE_RESET_ONLY     3
+#define GLOBAL_RESET	1
+#define HOST_RESET_ONLY	2
+#define CSE_RESET_ONLY	3

-/*HMRFPO Status types */
+/* HMRFPO Status types */
 #define MKHI_HMRFPO_DISABLED	0
 #define MKHI_HMRFPO_LOCKED	1
 #define MKHI_HMRFPO_ENABLED	2

-#endif // SOC_INTEL_COMMON_MSR_H
+#endif // SOC_INTEL_COMMON_CSE_H

Change in coreboot[master]: soc/intel/common/cse: Add description for macros

[Sridhar Siricilla (Code Review)]

Hello Patrick Rudolph, Subrata Banik, Rizwan Qureshi, build bot (Jenkins), Furquan Shaikh, Patrick Georgi,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38248

to look at the new patch set (#2).

Change subject: soc/intel/common/cse: Add description for macros
......................................................................

soc/intel/common/cse: Add description for macros

Below changes are done in the patch:
1. Remove unnecessary lining, and replace spaces with tabs
2. Add description for macros
3. Correct comment mentioned for wrapper #ifndef

TEST=Build and Boot hatch board

Change-Id: I630446234321e7998ab42f8506a58b16e9ce4eb0
Signed-off-by: Sridhar Siricilla 
---
M src/soc/intel/common/block/include/intelblocks/cse.h
1 file changed, 9 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/38248/2

Change in coreboot[master]: soc/intel/common/cse: Add description for macros

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38248 )

Change subject: soc/intel/common/cse: Add description for macros
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38248/2/src/soc/intel/common/block/... 
File src/soc/intel/common/block/include/intelblocks/cse.h:

https://review.coreboot.org/c/coreboot/+/38248/2/src/soc/intel/common/block/... 
PS2, Line 140: Fixed
What does "Fixed" mean?

Change in coreboot[master]: soc/intel/common/cse: Add description for macros

[Sridhar Siricilla (Code Review)]

Hello Patrick Rudolph, Subrata Banik, Rizwan Qureshi, build bot (Jenkins), Furquan Shaikh, Patrick Georgi,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38248

to look at the new patch set (#3).

Change subject: soc/intel/common/cse: Add description for macros
......................................................................

soc/intel/common/cse: Add description for macros

Below changes are done in the patch:
1. Remove unnecessary lining, and replace spaces with tabs
2. Add description for macros
3. Correct comment mentioned for wrapper #ifndef

TEST=Build and Boot hatch board

Change-Id: I630446234321e7998ab42f8506a58b16e9ce4eb0
Signed-off-by: Sridhar Siricilla 
---
M src/soc/intel/common/block/include/intelblocks/cse.h
1 file changed, 9 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/38248/3

Change in coreboot[master]: soc/intel/common/cse: Add description for macros

[Sridhar Siricilla (Code Review)]

Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38248 )

Change subject: soc/intel/common/cse: Add description for macros
......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38248/2/src/soc/intel/common/block/... 
File src/soc/intel/common/block/include/intelblocks/cse.h:

https://review.coreboot.org/c/coreboot/+/38248/2/src/soc/intel/common/block/... 
PS2, Line 140: Fixed
> What does "Fixed" mean?

It's Fixed Address MEI Header structure. So, I named accordinly to match with ME BWG guide.

Change in coreboot[master]: soc/intel/common/cse: Add description for macros

[Sridhar Siricilla (Code Review)]

Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38248 )

Change subject: soc/intel/common/cse: Add description for macros
......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38248/2/src/soc/intel/common/block/... 
File src/soc/intel/common/block/include/intelblocks/cse.h:

https://review.coreboot.org/c/coreboot/+/38248/2/src/soc/intel/common/block/... 
PS2, Line 140: Fixed
> It's Fixed Address MEI Header structure. So, I named accordinly to match with ME BWG guide.

Done

Change in coreboot[master]: soc/intel/common/cse: Add description for macros

[Sridhar Siricilla (Code Review)]

Hello Patrick Rudolph, Subrata Banik, Rizwan Qureshi, build bot (Jenkins), Furquan Shaikh, Patrick Georgi,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38248

to look at the new patch set (#4).

Change subject: soc/intel/common/cse: Add description for macros
......................................................................

soc/intel/common/cse: Add description for macros

Below changes are done in the patch:
1. Remove unnecessary lining, and replace spaces with tabs
2. Add description for macros
3. Correct comment mentioned for wrapper #ifndef

TEST=Build and Boot hatch board

Change-Id: I630446234321e7998ab42f8506a58b16e9ce4eb0
Signed-off-by: Sridhar Siricilla 
---
M src/soc/intel/common/block/include/intelblocks/cse.h
1 file changed, 10 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/38248/4

Change in coreboot[master]: soc/intel/common/cse: Add description for macros

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38248 )

Change subject: soc/intel/common/cse: Add description for macros
......................................................................

Patch Set 4: Code-Review+2

Change in coreboot[master]: soc/intel/common/cse: Add description for macros

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38248 )

Change subject: soc/intel/common/cse: Add description for macros
......................................................................

soc/intel/common/cse: Add description for macros

Below changes are done in the patch:
1. Remove unnecessary lining, and replace spaces with tabs
2. Add description for macros
3. Correct comment mentioned for wrapper #ifndef

TEST=Build and Boot hatch board

Change-Id: I630446234321e7998ab42f8506a58b16e9ce4eb0
Signed-off-by: Sridhar Siricilla 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38248
Tested-by: build bot (Jenkins) 
Reviewed-by: Furquan Shaikh 
---
M src/soc/intel/common/block/include/intelblocks/cse.h
1 file changed, 10 insertions(+), 9 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved

diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h
index 751c01d..bf829b0 100644
--- a/src/soc/intel/common/block/include/intelblocks/cse.h
+++ b/src/soc/intel/common/block/include/intelblocks/cse.h
@@ -26,7 +26,7 @@
 /* Global Reset Command ID */
 #define MKHI_CBM_GLOBAL_RESET_REQ   0xb

-/* RST Origin  */
+/* Origin of Global Reset command */
 #define GR_ORIGIN_BIOS_POST     0x2

/* HMRFPO Command Ids */
@@ -127,7 +127,6 @@
  */
 bool is_cse_enabled(void);

-
 /* Makes the host ready to communicate with CSE*/
 void set_host_ready(void);

@@ -157,18 +156,20 @@
  */
 int send_hmrfpo_get_status_msg(void);

+/* Fixed Address MEI Header's Host Address field value */
+#define BIOS_HOST_ADDR	0x00

-#define BIOS_HOST_ADDR							0x00
-#define HECI_MKHI_ADDR							0x07
+/* Fixed Address MEI Header's ME Address field value */
+#define HECI_MKHI_ADDR	0x07

/* Command GLOBAL_RESET_REQ Reset Types */
-#define GLOBAL_RESET       1
-#define HOST_RESET_ONLY    2
-#define CSE_RESET_ONLY     3
+#define GLOBAL_RESET	1
+#define HOST_RESET_ONLY	2
+#define CSE_RESET_ONLY	3

-/*HMRFPO Status types */
+/* HMRFPO Status types */
 #define MKHI_HMRFPO_DISABLED	0
 #define MKHI_HMRFPO_LOCKED	1
 #define MKHI_HMRFPO_ENABLED	2

-#endif // SOC_INTEL_COMMON_MSR_H
+#endif // SOC_INTEL_COMMON_CSE_H