Change in coreboot[master]: mb/asus/am1i-a/buildOpts.c: choose the 1600 MHz RAM frequency

[Mike Banon (Code Review)]

Mike Banon has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44462 )

Change subject: mb/asus/am1i-a/buildOpts.c: choose the 1600 MHz RAM frequency
......................................................................

mb/asus/am1i-a/buildOpts.c: choose the 1600 MHz RAM frequency

Together with the "AMD_XMP" changes, now this board with Crucial
BLT8G3D1869DT1TX0 sticks could run at 1600 MHz CL8 (8-8-9-23) speeds.
Earlier only 1333 MHz CL9 (9-9-10-27) has been possible with coreboot.

1866 MHz CL9 is impossible on f16kb without northbridge overclocking.
tRP in "CL-tRCD-tRP-tRAS" gets set 1 point higher by AGESA because of
Errata 638. See more info in a BKDG for AMD Family 16h Models 00h-0Fh.

Signed-off-by: Mike Banon 
Change-Id: I7e9f5120421221043f9f9dfe143b51bfa61936be
---
M src/mainboard/asus/am1i-a/buildOpts.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/44462/1

diff --git a/src/mainboard/asus/am1i-a/buildOpts.c b/src/mainboard/asus/am1i-a/buildOpts.c
index fe0915b..d143cc3 100644
--- a/src/mainboard/asus/am1i-a/buildOpts.c
+++ b/src/mainboard/asus/am1i-a/buildOpts.c
@@ -40,7 +40,7 @@
 #define BLDCFG_MEMORY_SODIMM_CAPABLE		FALSE
 #define BLDCFG_MEMORY_ENABLE_BANK_INTERLEAVING	FALSE
 #define BLDCFG_MEMORY_CHANNEL_INTERLEAVING	FALSE
-#define BLDCFG_MEMORY_CLOCK_SELECT		DDR1333_FREQUENCY /* FIXME: Turtle RAM? */
+#define BLDCFG_MEMORY_CLOCK_SELECT		DDR1600_FREQUENCY
 #define BLDCFG_IGNORE_SPD_CHECKSUM		TRUE
 #define BLDCFG_ENABLE_ECC_FEATURE		FALSE
 #define BLDCFG_ECC_SYNC_FLOOD			FALSE

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44462 )

Change subject: mb/asus/am1i-a/buildOpts.c: choose the 1600 MHz RAM frequency
......................................................................

Patch Set 1:

(2 comments)

https://review.coreboot.org/c/coreboot/+/44462/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/44462/1//COMMIT_MSG@7 
PS1, Line 7: 1600 MHz
DDR3-1600 != 1600 MHz

(DDR3-1600 == 1600 MT/s)

https://review.coreboot.org/c/coreboot/+/44462/1//COMMIT_MSG@9 
PS1, Line 9: Together with the "AMD_XMP" changes
Are they needed? Or does this patch work properly on its own? I'd say this patch should make DDR3-1600 work

Change in coreboot[master]: mb/asus/am1i-a/buildOpts.c: choose the 1600 MT/s RAM frequency

[Mike Banon (Code Review)]

Hello build bot (Jenkins), Paul Menzel, Angel Pons, HAOUAS Elyes,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/44462

to look at the new patch set (#3).

Change subject: mb/asus/am1i-a/buildOpts.c: choose the 1600 MT/s RAM frequency
......................................................................

mb/asus/am1i-a/buildOpts.c: choose the 1600 MT/s RAM frequency

Together with the "AMD_XMP" changes, now this board with Crucial
BLT8G3D1869DT1TX0 sticks could run at 1600 MT/s CL8 (8-8-9-23) speeds.
Earlier only 1333 MT/s CL9 (9-9-10-27) has been possible with coreboot.

1866 MT/s CL9 is impossible on f16kb without northbridge overclocking.
tRP in "CL-tRCD-tRP-tRAS" gets set 1 point higher by AGESA because of
Errata 638. See more info in a BKDG for AMD Family 16h Models 00h-0Fh.

Signed-off-by: Mike Banon 
Change-Id: I7e9f5120421221043f9f9dfe143b51bfa61936be
---
M src/mainboard/asus/am1i-a/buildOpts.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/44462/3

Change in coreboot[master]: mb/asus/am1i-a/buildOpts.c: choose the 1600 MT/s RAM frequency

[Mike Banon (Code Review)]

Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44462 )

Change subject: mb/asus/am1i-a/buildOpts.c: choose the 1600 MT/s RAM frequency
......................................................................

Patch Set 3:

(2 comments)

https://review.coreboot.org/c/coreboot/+/44462/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/44462/1//COMMIT_MSG@7 
PS1, Line 7: 1600 MHz
> DDR3-1600 != 1600 MHz […]

Done

https://review.coreboot.org/c/coreboot/+/44462/1//COMMIT_MSG@9 
PS1, Line 9: Together with the "AMD_XMP" changes
> Are they needed? Or does this patch work properly on its own? I'd say this patch should make DDR3-16 […]

Yes, AMD_XMP are needed at least for Crucial BLT8G3D1869DT1TX0 sticks mentioned below, because these sticks - like many others - don't have anything higher than DDR3-1333 at its' JEDEC half (lower 128 bytes) of SPD memory. So, in practice, this patch alone often isn't enough to get a desired DDR3-1600.

Change in coreboot[master]: mb/asus/am1i-a/buildOpts.c: choose the 1600 MT/s RAM frequency

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44462 )

Change subject: mb/asus/am1i-a/buildOpts.c: choose the 1600 MT/s RAM frequency
......................................................................

Patch Set 3: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/44462/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/44462/1//COMMIT_MSG@9 
PS1, Line 9: Together with the "AMD_XMP" changes
> Yes, AMD_XMP are needed at least for Crucial BLT8G3D1869DT1TX0 sticks mentioned below, because these […]

Ack

Change in coreboot[master]: mb/asus/am1i-a/buildOpts.c: choose the 1600 MT/s RAM frequency

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44462 )

Change subject: mb/asus/am1i-a/buildOpts.c: choose the 1600 MT/s RAM frequency
......................................................................

mb/asus/am1i-a/buildOpts.c: choose the 1600 MT/s RAM frequency

Together with the "AMD_XMP" changes, now this board with Crucial
BLT8G3D1869DT1TX0 sticks could run at 1600 MT/s CL8 (8-8-9-23) speeds.
Earlier only 1333 MT/s CL9 (9-9-10-27) has been possible with coreboot.

1866 MT/s CL9 is impossible on f16kb without northbridge overclocking.
tRP in "CL-tRCD-tRP-tRAS" gets set 1 point higher by AGESA because of
Errata 638. See more info in a BKDG for AMD Family 16h Models 00h-0Fh.

Signed-off-by: Mike Banon 
Change-Id: I7e9f5120421221043f9f9dfe143b51bfa61936be
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44462
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/asus/am1i-a/buildOpts.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/mainboard/asus/am1i-a/buildOpts.c b/src/mainboard/asus/am1i-a/buildOpts.c
index fe0915b..d143cc3 100644
--- a/src/mainboard/asus/am1i-a/buildOpts.c
+++ b/src/mainboard/asus/am1i-a/buildOpts.c
@@ -40,7 +40,7 @@
 #define BLDCFG_MEMORY_SODIMM_CAPABLE		FALSE
 #define BLDCFG_MEMORY_ENABLE_BANK_INTERLEAVING	FALSE
 #define BLDCFG_MEMORY_CHANNEL_INTERLEAVING	FALSE
-#define BLDCFG_MEMORY_CLOCK_SELECT		DDR1333_FREQUENCY /* FIXME: Turtle RAM? */
+#define BLDCFG_MEMORY_CLOCK_SELECT		DDR1600_FREQUENCY
 #define BLDCFG_IGNORE_SPD_CHECKSUM		TRUE
 #define BLDCFG_ENABLE_ECC_FEATURE		FALSE
 #define BLDCFG_ECC_SYNC_FLOOD			FALSE

Change in coreboot[master]: mb/asus/am1i-a/buildOpts.c: choose the 1600 MT/s RAM frequency

[9elements QA (Code Review)]

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44462 )

Change subject: mb/asus/am1i-a/buildOpts.c: choose the 1600 MT/s RAM frequency
......................................................................

Patch Set 4:

Automatic boot test returned (PASS/FAIL/TOTAL): 7/1/8
"QEMU x86 q35/ich9" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/15933
"QEMU x86 q35/ich9" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/15932
"QEMU x86 i440fx/piix4" (x86_64) using payload SeaBIOS : FAIL : https://lava.9esec.io/r/15931
"QEMU x86 i440fx/piix4" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/15930
"QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/15929
"HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/15936
"HP Compaq 8200 Elite SFF PC" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/15935
"HP Compaq 8200 Elite SFF PC" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/15934

Please note: This test is under development and might not be accurate at all!