Change in ...coreboot[master]: mb/google/sarien/variants/sarien: Add GPIO H3 and H15 for DVT1
John Su has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31330
Change subject: mb/google/sarien/variants/sarien: Add GPIO H3 and H15 for DVT1 ......................................................................
mb/google/sarien/variants/sarien: Add GPIO H3 and H15 for DVT1
Follow b:123342945 to add GPIO H3 and H15 for DVT1.
BUG=b:123342945 TEST=Built and tested on sarien system
Change-Id: I0caf97f6a2a8abf2914667350c76300733ead1b8 Signed-off-by: John Su john_su@compal.corp-partner.google.com --- M src/mainboard/google/sarien/variants/sarien/gpio.c 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/31330/1
diff --git a/src/mainboard/google/sarien/variants/sarien/gpio.c b/src/mainboard/google/sarien/variants/sarien/gpio.c index f773265..6c20f4e 100644 --- a/src/mainboard/google/sarien/variants/sarien/gpio.c +++ b/src/mainboard/google/sarien/variants/sarien/gpio.c @@ -188,7 +188,7 @@ /* I2S2_SCLK */ PAD_NC(GPP_H0, NONE), /* I2S2_SFRM */ PAD_CFG_NF(GPP_H1, NONE, DEEP, NF3), /* CNV_RF_RESET# */ /* I2S2_TXD */ PAD_CFG_NF(GPP_H2, NONE, DEEP, NF3), /* CLKREQ_CNV# */ -/* I2S2_RXD */ PAD_NC(GPP_H3, NONE), +/* I2S2_RXD */ PAD_CFG_GPI(GPP_H3, NONE, DEEP), /* I2C2_SDA */ PAD_NC(GPP_H4, NONE), /* T388 */ /* I2C2_SCL */ PAD_NC(GPP_H5, NONE), /* T389 */ /* I2C3_SDA */ PAD_NC(GPP_H6, NONE), /* T378 */ @@ -200,7 +200,7 @@ /* M2_SKT2_CFG0 */ PAD_NC(GPP_H12, NONE), /* M2_SKT2_CFG1 */ PAD_NC(GPP_H13, NONE), /* M2_SKT2_CFG2 */ PAD_NC(GPP_H14, NONE), -/* M2_SKT2_CFG3 */ PAD_NC(GPP_H15, NONE), +/* M2_SKT2_CFG3 */ PAD_CFG_GPO(GPP_H15, 1, DEEP), /* DDPF_CTRLCLK */ PAD_NC(GPP_H16, NONE), /* DPPF_CTRLDATA */ PAD_NC(GPP_H17, NONE), /* CPU_C10_GATE# */ PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* C10_GATE# */
Hello Ivy Jian, EricR Lai, Chris Zhou, Duncan Laurie, Van Chen, Frank Wu, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31330
to look at the new patch set (#2).
Change subject: mb/google/sarien/variants/sarien: Add GPIO H3 and H15 for DVT1 ......................................................................
mb/google/sarien/variants/sarien: Add GPIO H3 and H15 for DVT1
Follow b:123342945 to add GPIO H3 and H15 for DVT1.
BUG=b:123342945 TEST=Built and tested on sarien system
Change-Id: I0caf97f6a2a8abf2914667350c76300733ead1b8 Signed-off-by: John Su john_su@compal.corp-partner.google.com --- M src/mainboard/google/sarien/variants/sarien/gpio.c 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/31330/2
Hello Ivy Jian, EricR Lai, Chris Zhou, Duncan Laurie, Van Chen, Frank Wu, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31330
to look at the new patch set (#3).
Change subject: mb/google/sarien/variants/sarien: Add GPIO H15 for DVT1 ......................................................................
mb/google/sarien/variants/sarien: Add GPIO H15 for DVT1
Follow b:123342945 to add GPIO H15(BT_RADIO_DIS#) for DVT1.
BUG=b:123342945 TEST=Built and tested on sarien system
Change-Id: I0caf97f6a2a8abf2914667350c76300733ead1b8 Signed-off-by: John Su john_su@compal.corp-partner.google.com --- M src/mainboard/google/sarien/variants/sarien/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/31330/3
John Su has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31330 )
Change subject: mb/google/sarien/variants/sarien: Add GPIO H15 for DVT1 ......................................................................
Patch Set 3:
Hi Duncan Could you help to review? Thanks
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31330 )
Change subject: mb/google/sarien/variants/sarien: Add GPIO H15 for DVT1 ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31330 )
Change subject: mb/google/sarien/variants/sarien: Add GPIO H15 for DVT1 ......................................................................
mb/google/sarien/variants/sarien: Add GPIO H15 for DVT1
Follow b:123342945 to add GPIO H15(BT_RADIO_DIS#) for DVT1.
BUG=b:123342945 TEST=Built and tested on sarien system
Change-Id: I0caf97f6a2a8abf2914667350c76300733ead1b8 Signed-off-by: John Su john_su@compal.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/31330 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Duncan Laurie dlaurie@chromium.org --- M src/mainboard/google/sarien/variants/sarien/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Duncan Laurie: Looks good to me, approved
diff --git a/src/mainboard/google/sarien/variants/sarien/gpio.c b/src/mainboard/google/sarien/variants/sarien/gpio.c index f773265..b248e11 100644 --- a/src/mainboard/google/sarien/variants/sarien/gpio.c +++ b/src/mainboard/google/sarien/variants/sarien/gpio.c @@ -200,7 +200,7 @@ /* M2_SKT2_CFG0 */ PAD_NC(GPP_H12, NONE), /* M2_SKT2_CFG1 */ PAD_NC(GPP_H13, NONE), /* M2_SKT2_CFG2 */ PAD_NC(GPP_H14, NONE), -/* M2_SKT2_CFG3 */ PAD_NC(GPP_H15, NONE), +/* M2_SKT2_CFG3 */ PAD_CFG_GPO(GPP_H15, 1, DEEP), /* BT_RADIO_DIS# */ /* DDPF_CTRLCLK */ PAD_NC(GPP_H16, NONE), /* DPPF_CTRLDATA */ PAD_NC(GPP_H17, NONE), /* CPU_C10_GATE# */ PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* C10_GATE# */
-
Duncan Laurie (Code Review) -
John Su (Code Review)
-
Patrick Georgi (Code Review)