HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38244 )
Change subject: nb/amd/pi: Fix typos ......................................................................
nb/amd/pi: Fix typos
Change-Id: I79ec3a346edde0a63cf344352e58dfb78556dfd8 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/amd/pi/00630F01/northbridge.c M src/northbridge/amd/pi/00660F01/northbridge.c M src/northbridge/amd/pi/00730F01/northbridge.c 3 files changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/38244/1
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index b55b23c..2295cd6 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -860,7 +860,7 @@ u32 lapicid_start = 0;
/* - * APIC ID calucation is tightly coupled with AGESA v5 code. + * APIC ID calculation is tightly coupled with AGESA v5 code. * This calculation MUST match the assignment calculation done * in LocalApicInitializationAtEarly() function. * And reference GetLocalApicIdForCore() diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c index 7dc338e..16b5734 100644 --- a/src/northbridge/amd/pi/00660F01/northbridge.c +++ b/src/northbridge/amd/pi/00660F01/northbridge.c @@ -645,7 +645,7 @@ base_k = ((resource_t)(d.base & 0x1fffff00)) <<9; if (base_k > 4 *1024 * 1024) break; // don't need to go to check if (limitk_pri != base_k) { // we find the hole - mem_hole.hole_startk = (unsigned int)limitk_pri; // must beblow 4G + mem_hole.hole_startk = (unsigned int)limitk_pri; // must be below 4G mem_hole.node_id = i; break; //only one hole } @@ -858,7 +858,7 @@ u32 lapicid_start = 0;
/* - * APIC ID calucation is tightly coupled with AGESA v5 code. + * APIC ID calculation is tightly coupled with AGESA v5 code. * This calculation MUST match the assignment calculation done * in LocalApicInitializationAtEarly() function. * And reference GetLocalApicIdForCore() diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 8da3f0a..e5a75e8 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -869,7 +869,7 @@ base_k = ((resource_t)(d.base & 0x1fffff00)) <<9; if (base_k > 4 *1024 * 1024) break; // don't need to go to check if (limitk_pri != base_k) { // we find the hole - mem_hole.hole_startk = (unsigned int)limitk_pri; // must beblow 4G + mem_hole.hole_startk = (unsigned int)limitk_pri; // must be below 4G mem_hole.node_id = i; break; //only one hole } @@ -1097,7 +1097,7 @@ u32 lapicid_start = 0;
/* - * APIC ID calucation is tightly coupled with AGESA v5 code. + * APIC ID calculation is tightly coupled with AGESA v5 code. * This calculation MUST match the assignment calculation done * in LocalApicInitializationAtEarly() function. * And reference GetLocalApicIdForCore()
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38244 )
Change subject: nb/amd/pi: Fix typos ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/38244/1/src/northbridge/amd/pi/0066... File src/northbridge/amd/pi/00660F01/northbridge.c:
https://review.coreboot.org/c/coreboot/+/38244/1/src/northbridge/amd/pi/0066... PS1, Line 648: mem_hole.hole_startk = (unsigned int)limitk_pri; // must be below 4G line over 96 characters
https://review.coreboot.org/c/coreboot/+/38244/1/src/northbridge/amd/pi/0073... File src/northbridge/amd/pi/00730F01/northbridge.c:
https://review.coreboot.org/c/coreboot/+/38244/1/src/northbridge/amd/pi/0073... PS1, Line 872: mem_hole.hole_startk = (unsigned int)limitk_pri; // must be below 4G line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38244 )
Change subject: nb/amd/pi: Fix typos ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/38244/2/src/northbridge/amd/pi/0066... File src/northbridge/amd/pi/00660F01/northbridge.c:
https://review.coreboot.org/c/coreboot/+/38244/2/src/northbridge/amd/pi/0066... PS2, Line 648: mem_hole.hole_startk = (unsigned int)limitk_pri; // must be below 4G line over 96 characters
https://review.coreboot.org/c/coreboot/+/38244/2/src/northbridge/amd/pi/0073... File src/northbridge/amd/pi/00730F01/northbridge.c:
https://review.coreboot.org/c/coreboot/+/38244/2/src/northbridge/amd/pi/0073... PS2, Line 872: mem_hole.hole_startk = (unsigned int)limitk_pri; // must be below 4G line over 96 characters
Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38244 )
Change subject: nb/amd/pi: Fix typos ......................................................................
Patch Set 2: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38244 )
Change subject: nb/amd/pi: Fix typos ......................................................................
Patch Set 2: Code-Review+1
Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38244 )
Change subject: nb/amd/pi: Fix typos ......................................................................
nb/amd/pi: Fix typos
Change-Id: I79ec3a346edde0a63cf344352e58dfb78556dfd8 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/38244 Reviewed-by: Michał Żygowski michal.zygowski@3mdeb.com Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/amd/pi/00630F01/northbridge.c M src/northbridge/amd/pi/00660F01/northbridge.c M src/northbridge/amd/pi/00730F01/northbridge.c 3 files changed, 5 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Michał Żygowski: Looks good to me, approved
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index b55b23c..2295cd6 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -860,7 +860,7 @@ u32 lapicid_start = 0;
/* - * APIC ID calucation is tightly coupled with AGESA v5 code. + * APIC ID calculation is tightly coupled with AGESA v5 code. * This calculation MUST match the assignment calculation done * in LocalApicInitializationAtEarly() function. * And reference GetLocalApicIdForCore() diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c index 7dc338e..16b5734 100644 --- a/src/northbridge/amd/pi/00660F01/northbridge.c +++ b/src/northbridge/amd/pi/00660F01/northbridge.c @@ -645,7 +645,7 @@ base_k = ((resource_t)(d.base & 0x1fffff00)) <<9; if (base_k > 4 *1024 * 1024) break; // don't need to go to check if (limitk_pri != base_k) { // we find the hole - mem_hole.hole_startk = (unsigned int)limitk_pri; // must beblow 4G + mem_hole.hole_startk = (unsigned int)limitk_pri; // must be below 4G mem_hole.node_id = i; break; //only one hole } @@ -858,7 +858,7 @@ u32 lapicid_start = 0;
/* - * APIC ID calucation is tightly coupled with AGESA v5 code. + * APIC ID calculation is tightly coupled with AGESA v5 code. * This calculation MUST match the assignment calculation done * in LocalApicInitializationAtEarly() function. * And reference GetLocalApicIdForCore() diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 8da3f0a..e5a75e8 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -869,7 +869,7 @@ base_k = ((resource_t)(d.base & 0x1fffff00)) <<9; if (base_k > 4 *1024 * 1024) break; // don't need to go to check if (limitk_pri != base_k) { // we find the hole - mem_hole.hole_startk = (unsigned int)limitk_pri; // must beblow 4G + mem_hole.hole_startk = (unsigned int)limitk_pri; // must be below 4G mem_hole.node_id = i; break; //only one hole } @@ -1097,7 +1097,7 @@ u32 lapicid_start = 0;
/* - * APIC ID calucation is tightly coupled with AGESA v5 code. + * APIC ID calculation is tightly coupled with AGESA v5 code. * This calculation MUST match the assignment calculation done * in LocalApicInitializationAtEarly() function. * And reference GetLocalApicIdForCore()
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build bot (Jenkins) (Code Review) -
HAOUAS Elyes (Code Review)
-
Kyösti Mälkki (Code Review)
-
Michał Żygowski (Code Review)
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Paul Menzel (Code Review)