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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56004
to look at the new patch set (#2).
Change subject: soc/intel/common/block/acpi: Move pep.asl to acpigen ......................................................................
soc/intel/common/block/acpi: Move pep.asl to acpigen
There is a use-case for generating the AML bytecode at runtime for the Intel Power Engine device, which comes in a followup patch.
BUG=b:185437326 TEST=select this on brya, dump SSDT (verified this matches what was previously in the DSDT): Scope (_SB.PCI0) { Device (PEPD) { Name (_HID, "INT33A1") Name (_CID, EisaId ("INT33A1") Method (_DSM, 4, Serialized) { ToBuffer (Arg0, Local0) If ((Local0 == ToUUID ("c4eb40a0-6cd2-11e2-bcfd-0800200c9a66"))) { ToInteger (Arg2, Local1) If ((Local1 == Zero)) { Return (Buffer (One) { 0x63 }) } If ((Local1 == One)) { Return (Package (0x01) { Package (0x03) { \NULL, Zero, Package (0x02) { Zero, Package (0x02) { 0xFF, Zero } } } }) } If ((Local1 == 0x02)){} If ((Local1 == 0x03)){} If ((Local1 == 0x04)){} If ((Local1 == 0x05)) { If (CondRefOf (_SB.PCI0.LPCB.EC0.S0IX)) { _SB.PCI0.LPCB.EC0.S0IX (One) }
If (CondRefOf (_SB.MS0X)) { _SB.MS0X (One) }
If (CondRefOf (_SB.PCI0.EGPM)) { _SB.PCI0.EGPM () } }
If ((Local1 == 0x06)) { If (CondRefOf (_SB.PCI0.LPCB.EC0.S0IX)) { _SB.PCI0.LPCB.EC0.S0IX (Zero) }
If (CondRefOf (_SB.MS0X)) { _SB.MS0X (Zero) }
If (CondRefOf (_SB.PCI0.RGPM)) { _SB.PCI0.RGPM () } }
Return (Buffer (One) { 0x00 }) }
Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Change-Id: Ie83722e0ed5792e338fc5c39a57eef43b7464e3b --- M src/soc/intel/common/block/acpi/Kconfig M src/soc/intel/common/block/acpi/Makefile.inc A src/soc/intel/common/block/acpi/pep.c M src/soc/intel/common/block/include/intelblocks/acpi.h 4 files changed, 154 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/56004/2