Aaron Durbin (adurbin@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5017
-gerrit
commit ac5d9199850bf299e2a9e0ada339430b660761df Author: Duncan Laurie dlaurie@chromium.org Date: Thu Dec 12 16:55:36 2013 -0800
baytrail: Put devices in ACPI mode after setup
Make sure reg_script is executed before the device is put into ACPI mode.
BUG=chrome-os-partner:24380 BRANCH=none TEST=build and boot rambi from eMMC in ACPI mode
Change-Id: I4090babbfc7fb0f3be4da869386e998d87a513ba Signed-off-by: Duncan Laurie dlaurie@chromium.org Reviewed-on: https://chromium-review.googlesource.com/179896 Reviewed-by: Aaron Durbin adurbin@chromium.org Signed-off-by: Aaron Durbin adurbin@chromium.org --- src/soc/intel/baytrail/emmc.c | 5 +++-- src/soc/intel/baytrail/lpss.c | 3 +-- 2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/soc/intel/baytrail/emmc.c b/src/soc/intel/baytrail/emmc.c index a724c4a..f88614b 100644 --- a/src/soc/intel/baytrail/emmc.c +++ b/src/soc/intel/baytrail/emmc.c @@ -53,10 +53,11 @@ static void emmc_init(device_t dev) { struct soc_intel_baytrail_config *config = dev->chip_info;
- if (config->scc_acpi_mode) - scc_enable_acpi_mode(dev, SCC_MMC_CTL, SCC_NVS_MMC); printk(BIOS_DEBUG, "eMMC init\n"); reg_script_run_on_dev(dev, emmc_ops); + + if (config->scc_acpi_mode) + scc_enable_acpi_mode(dev, SCC_MMC_CTL, SCC_NVS_MMC); }
static struct device_operations device_ops = { diff --git a/src/soc/intel/baytrail/lpss.c b/src/soc/intel/baytrail/lpss.c index a543fd8..3ee648a 100644 --- a/src/soc/intel/baytrail/lpss.c +++ b/src/soc/intel/baytrail/lpss.c @@ -165,11 +165,10 @@ static void lpss_init(device_t dev) return; } dev_enable_snoop_and_pm(dev, iosf_reg); + i2c_disable_resets(dev);
if (config->lpss_acpi_mode) dev_enable_acpi_mode(dev, iosf_reg, nvs_index); - - i2c_disable_resets(dev); }
static struct device_operations device_ops = {