Change in coreboot[master]: soc/intel/{skl,cnl,icl,jsl,elh,tgl}: make XTAL S0ix qualification opt...
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45723 )
Change subject: soc/intel/{skl,cnl,icl,jsl,elh,tgl}: make XTAL S0ix qualification optional ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45723/2/src/soc/intel/cannonlake/ch... File src/soc/intel/cannonlake/chip.h:
https://review.coreboot.org/c/coreboot/+/45723/2/src/soc/intel/cannonlake/ch... PS2, Line 61: uint8_t s0ix_allow_xtal_on;
8254 clock gating is required for XTAL shutdown […]
Found a hint that might explain the bit, just a theory: Normally, when SLP_S0# gets asserted the VR might shut further down. I guess this can be problematic when the XTAL is still running. The bit, then should only be set if one is sure that the VR can take it (the additional load of the XTAL).
But if this is about the VRs capabilities, I wonder a) why was that never mentioned before, and b) why was the bit set unconditionally.
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Nico Huber (Code Review)