Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85272?usp=email )
Change subject: mb/google/fatcat: Enable SAGv ......................................................................
mb/google/fatcat: Enable SAGv
Enable SaGv support for fatcat
BUG=None BRANCH=None TEST=Boot fatcat with SAGv enabled and verify in fsp debug logs
Change-Id: I340f4951fd33deadaac53edd30e2cf6bfc2a750b Signed-off-by: Bora Guvendik bora.guvendik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/85272 Reviewed-by: Pranava Y N pranavayn@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subratabanik@google.com --- M src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Pranava Y N: Looks good to me, approved
diff --git a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb index b9dcbbd..ec87353 100644 --- a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb +++ b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb @@ -30,6 +30,9 @@ register "tcss_ports[2]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 2 register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 3
+ # Enable SAGv + register "sagv" = "SAGV_ENABLED" + # Enable s0ix register "s0ix_enable" = "false"