Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47253 )
Change subject: soc/intel/xeon_sp: Fix generating DMAR IOAPIC ......................................................................
soc/intel/xeon_sp: Fix generating DMAR IOAPIC
Using the stack number from the HOB for the lookup table results in wrong IOAPIC ID for PSTACK2. Translate the HOB stack number to a lookup table IDX. This way DMAR is aligned to the APIC ACPI table.
This Fixes Linux complaining about not remapping Interrupts for IOAPIC 13.
Change-Id: I9b6da491f8d5d1004864c9d704578c3b060809cb Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/xeon_sp/nb_acpi.c 1 file changed, 18 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/47253/1
diff --git a/src/soc/intel/xeon_sp/nb_acpi.c b/src/soc/intel/xeon_sp/nb_acpi.c index cf397f7..b44fc3a 100644 --- a/src/soc/intel/xeon_sp/nb_acpi.c +++ b/src/soc/intel/xeon_sp/nb_acpi.c @@ -180,6 +180,23 @@ return (atsr_size + pci_br_size); }
+static int stack_to_ioapic_idx(const IIO_STACKS stack) +{ + switch (stack) { + case CSTACK: + return 0; + case PSTACK0: + return 1; + case PSTACK1: + return 2; + case PSTACK2: + return 3; + default: + printk(BIOS_ERR, "DMAR: unhandled IIO stack!\n"); + return -1; + } +} + static unsigned long acpi_create_drhd(unsigned long current, int socket, int stack, const IIO_UDS *hob) { @@ -230,7 +247,7 @@ }
// Add IOAPIC entry - enum_id = IoApicID[(socket*MAX_IIO_STACK)+stack]; + enum_id = IoApicID[(socket * MAX_IIO_STACK) + stack_to_ioapic_idx(stack)]; printk(BIOS_DEBUG, " [IOAPIC Device] Enumeration ID: 0x%x, PCI Bus Number: 0x%x, " "PCI Path: 0x%x, 0x%x\n", enum_id, bus, APIC_DEV_NUM, APIC_FUNC_NUM); current += acpi_create_dmar_ds_ioapic(current, enum_id, bus,
Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47253 )
Change subject: soc/intel/xeon_sp: Fix generating DMAR IOAPIC ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47253/1/src/soc/intel/xeon_sp/nb_ac... File src/soc/intel/xeon_sp/nb_acpi.c:
https://review.coreboot.org/c/coreboot/+/47253/1/src/soc/intel/xeon_sp/nb_ac... PS1, Line 183: static int stack_to_ioapic_idx(const IIO_STACKS stack) I think that this needs to go in soc_util.c to support each cpu. cpx and ksx have different number of stacks.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47253 )
Change subject: soc/intel/xeon_sp: Fix generating DMAR IOAPIC ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47253/1/src/soc/intel/xeon_sp/nb_ac... File src/soc/intel/xeon_sp/nb_acpi.c:
https://review.coreboot.org/c/coreboot/+/47253/1/src/soc/intel/xeon_sp/nb_ac... PS1, Line 183: static int stack_to_ioapic_idx(const IIO_STACKS stack)
I think that this needs to go in soc_util.c to support each cpu. […]
Ok. Maybe an stack to ioapic_id callback then? That way the synchronisation between the APIC and DMAR acpi table is not hacky like here?
Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/47253 )
Change subject: soc/intel/xeon_sp: Fix generating DMAR IOAPIC ......................................................................
Abandoned
superseded bu topic:xeon_sp_madt_dmar
-
Arthur Heymans (Code Review) -
Marc Jones (Code Review)