[S] Change in coreboot[main]: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table

[Cliff Huang (Code Review)]

Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Subrata Banik.

Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84103?usp=email )

Change subject: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table
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Patch Set 7:

(3 comments)

File src/soc/intel/common/block/acpi/acpi.c:

https://review.coreboot.org/c/coreboot/+/84103/comment/2ef8adcd_7cbcca9e?usp... :
PS5, Line 29: GPE1_STS
> > Subrata, […]

Sure. Let me make the change.

File src/soc/intel/common/block/acpi/acpi.c:

https://review.coreboot.org/c/coreboot/+/84103/comment/2ebc780e_7791a932?usp... :
PS7, Line 121: 	if (CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_USE_GPE1)) {
>

Acknowledged

https://review.coreboot.org/c/coreboot/+/84103/comment/8b04045d_2056d557?usp... :
PS7, Line 128:  8
> can you please explain why this is `8` I assume this is like `GPE1_REG_MAX` aka 4 and then two sets  […]

The unit for gpe1_base is bit and GPE0 block size is in bytes. The resulting is 0x80 (128), which is the next bit of GPE0 [127-0].