[M] Change in coreboot[master]: spd.h: Move enum ddr2_module_type to ddr2.h

[Elyes Haouas (Code Review)]

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71546 )

Change subject: spd.h: Move enum ddr2_module_type to ddr2.h
......................................................................

spd.h: Move enum ddr2_module_type to ddr2.h

Move specific enum ddr2_module_type to <device/dram/ddr2.h>.

Change-Id: I748658f9b349bff9b1ebe2c0a6acf71bf2a221ce
Signed-off-by: Elyes Haouas 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71546
Reviewed-by: Paul Menzel 
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/device/dram/spd.c
M src/include/device/dram/ddr2.h
M src/include/spd.h
M tests/lib/dimm_info_util-test.c
4 files changed, 39 insertions(+), 34 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Angel Pons: Looks good to me, approved

diff --git a/src/device/dram/spd.c b/src/device/dram/spd.c
index deff674..738c05b 100644
--- a/src/device/dram/spd.c
+++ b/src/device/dram/spd.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

+#include <device/dram/ddr2.h>
 #include <device/dram/spd.h>
 #include <spd.h>
 #include <stddef.h>
@@ -47,25 +48,25 @@
    info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
 }

-static void convert_ddr2_module_type_to_spd_info(enum ddr2_module_type module_type,
+static void convert_ddr2_module_type_to_spd_info(enum spd_dimm_type_ddr2 module_type,
    					 struct spd_info *info)
 {
    switch (module_type) {
-	case DDR2_SPD_RDIMM:
-	case DDR2_SPD_MINI_RDIMM:
+	case SPD_DDR2_DIMM_TYPE_RDIMM:
+	case SPD_DDR2_DIMM_TYPE_MINI_RDIMM:
    	info->form_factor = MEMORY_FORMFACTOR_RIMM;
    	info->type_detail = MEMORY_TYPE_DETAIL_REGISTERED;
    	break;
-	case DDR2_SPD_UDIMM:
-	case DDR2_SPD_MINI_UDIMM:
+	case SPD_DDR2_DIMM_TYPE_UDIMM:
+	case SPD_DDR2_DIMM_TYPE_MINI_UDIMM:
    	info->form_factor = MEMORY_FORMFACTOR_DIMM;
    	info->type_detail = MEMORY_TYPE_DETAIL_UNBUFFERED;
    	break;
-	case DDR2_SPD_MICRO_DIMM:
+	case SPD_DDR2_DIMM_TYPE_MICRO_DIMM:
    	info->form_factor = MEMORY_FORMFACTOR_DIMM;
    	info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
    	break;
-	case DDR2_SPD_SODIMM:
+	case SPD_DDR2_DIMM_TYPE_SO_DIMM:
    	info->form_factor = MEMORY_FORMFACTOR_SODIMM;
    	info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
    	break;
@@ -210,11 +211,11 @@

switch (form_factor) {
    case MEMORY_FORMFACTOR_DIMM:
-		return DDR2_SPD_UDIMM;
+		return SPD_DDR2_DIMM_TYPE_UDIMM;
    case MEMORY_FORMFACTOR_RIMM:
-		return DDR2_SPD_RDIMM;
+		return SPD_DDR2_DIMM_TYPE_RDIMM;
    case MEMORY_FORMFACTOR_SODIMM:
-		module_type = (memory_type == MEMORY_TYPE_DDR2) ? DDR2_SPD_SODIMM :
+		module_type = (memory_type == MEMORY_TYPE_DDR2) ? SPD_DDR2_DIMM_TYPE_SO_DIMM :
    								DDR3_SPD_SODIMM;
    	return module_type;
    default:
diff --git a/src/include/device/dram/ddr2.h b/src/include/device/dram/ddr2.h
index 6200fde..9277ffb 100644
--- a/src/include/device/dram/ddr2.h
+++ b/src/include/device/dram/ddr2.h
@@ -18,15 +18,12 @@
 #include <spd.h>
 #include <device/dram/common.h>

-/*
- * Module type (byte 20, bits 5:0) of SPD
- * This definition is specific to DDR2. DDR3 SPDs have a different structure.
- */
+/* Byte 20 [5:0]: DDR2 Module type information */
 enum spd_dimm_type_ddr2 {
-	SPD_DDR2_DIMM_TYPE_UNDEFINED			= 0x00,
-	SPD_DDR2_DIMM_TYPE_RDIMM			= 0x01,
-	SPD_DDR2_DIMM_TYPE_UDIMM			= 0x02,
-	SPD_DDR2_DIMM_TYPE_SO_DIMM			= 0x04,
+	SPD_DDR2_DIMM_TYPE_UNDEFINED		= 0x00,
+	SPD_DDR2_DIMM_TYPE_RDIMM		= 0x01,
+	SPD_DDR2_DIMM_TYPE_UDIMM		= 0x02,
+	SPD_DDR2_DIMM_TYPE_SO_DIMM		= 0x04,
    SPD_DDR2_DIMM_TYPE_72B_SO_CDIMM		= 0x06,
    SPD_DDR2_DIMM_TYPE_72B_SO_RDIMM		= 0x07,
    SPD_DDR2_DIMM_TYPE_MICRO_DIMM		= 0x08,
diff --git a/src/include/spd.h b/src/include/spd.h
index 7a6e5ab..25d0463 100644
--- a/src/include/spd.h
+++ b/src/include/spd.h
@@ -201,18 +201,6 @@
 #define SPD_ECC_8BIT (1<<3)
 #define SPD_ECC_8BIT_LP5_DDR5 (1<<4)

-/* Byte 20 [5:0]: DDR2 Module type information */
-enum ddr2_module_type {
-	DDR2_SPD_RDIMM = 0x01,
-	DDR2_SPD_UDIMM = 0x02,
-	DDR2_SPD_SODIMM = 0x04,
-	DDR2_SPD_72B_SO_CDIMM = 0x06,
-	DDR2_SPD_72B_SO_RDIMM = 0x07,
-	DDR2_SPD_MICRO_DIMM = 0x08,
-	DDR2_SPD_MINI_RDIMM = 0x10,
-	DDR2_SPD_MINI_UDIMM = 0x20,
-};
-
 /* Byte 3 [3:0]: DDR3 Module type information */
 enum ddr3_module_type {
    DDR3_SPD_RDIMM = 0x01,
diff --git a/tests/lib/dimm_info_util-test.c b/tests/lib/dimm_info_util-test.c
index cecbacb..e16f441 100644
--- a/tests/lib/dimm_info_util-test.c
+++ b/tests/lib/dimm_info_util-test.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

+#include <device/dram/ddr2.h>
 #include <dimm_info_util.h>
 #include <spd.h>
 #include <tests/test.h>
@@ -136,10 +137,12 @@
    } ddrx_info[] = {
    	{
    		.memory_type = MEMORY_TYPE_DDR2,
-			.udimm_allowed = {DDR2_SPD_UDIMM, DDR2_SPD_MICRO_DIMM,
-					  DDR2_SPD_MINI_UDIMM},
-			.rdimm_allowed = {DDR2_SPD_RDIMM, DDR2_SPD_MINI_RDIMM},
-			.expected_module_type = DDR2_SPD_SODIMM,
+			.udimm_allowed = {SPD_DDR2_DIMM_TYPE_UDIMM,
+					  SPD_DDR2_DIMM_TYPE_MICRO_DIMM,
+					  SPD_DDR2_DIMM_TYPE_MINI_UDIMM},
+			.rdimm_allowed = {SPD_DDR2_DIMM_TYPE_RDIMM,
+					  SPD_DDR2_DIMM_TYPE_MINI_RDIMM},
+			.expected_module_type = SPD_DDR2_DIMM_TYPE_SO_DIMM,
    	},
    	{
    		.memory_type = MEMORY_TYPE_DDR3,