Eric Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/64850 )
Change subject: mb/google/rex: Add memory init ......................................................................
mb/google/rex: Add memory init
Add memory init with placeholder. DQ map can be auto probed by fsp. So leave it as default.
BUG=b:224325352 TEST=util/abuild/abuild -p none -t google/rex -a -c max
Signed-off-by: Eric Lai eric_lai@quanta.corp-partner.google.com Change-Id: I5baa87411c28a20602eb5a7077f00664ccab3ade --- M src/mainboard/google/rex/romstage.c M src/mainboard/google/rex/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/rex/variants/baseboard/rex/Makefile.inc A src/mainboard/google/rex/variants/baseboard/rex/memory.c A src/mainboard/google/rex/variants/rex0/memory/Makefile.inc A src/mainboard/google/rex/variants/rex0/memory/dram_id.generated.txt A src/mainboard/google/rex/variants/rex0/memory/mem_parts_used.txt 7 files changed, 73 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/64850/1
diff --git a/src/mainboard/google/rex/romstage.c b/src/mainboard/google/rex/romstage.c index a993d14..9e41d46 100644 --- a/src/mainboard/google/rex/romstage.c +++ b/src/mainboard/google/rex/romstage.c @@ -3,12 +3,21 @@ #include <baseboard/variants.h> #include <fsp/api.h> #include <soc/romstage.h> +#include <string.h>
void mainboard_memory_init_params(FSPM_UPD *memupd) { const struct pad_config *pads; size_t pads_num; + const struct mb_cfg *mem_config = variant_memory_params(); + bool half_populated = variant_is_half_populated(); + struct mem_spd spd_info;
pads = variant_romstage_gpio_table(&pads_num); gpio_configure_pads(pads, pads_num); + + memset(&spd_info, 0, sizeof(spd_info)); + variant_get_spd_info(&spd_info); + + memcfg_init(memupd, mem_config, &spd_info, half_populated); } diff --git a/src/mainboard/google/rex/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/rex/variants/baseboard/include/baseboard/variants.h index c2dbe54..6fd64c9 100644 --- a/src/mainboard/google/rex/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/rex/variants/baseboard/include/baseboard/variants.h @@ -4,6 +4,7 @@ #define __BASEBOARD_VARIANTS_H__
#include <soc/gpio.h> +#include <soc/meminit.h> #include <stdint.h> #include <vendorcode/google/chromeos/chromeos.h>
@@ -15,4 +16,9 @@ const struct pad_config *variant_early_gpio_table(size_t *num); const struct pad_config *variant_romstage_gpio_table(size_t *num);
+const struct mb_cfg *variant_memory_params(void); +void variant_get_spd_info(struct mem_spd *spd_info); +int variant_memory_sku(void); +bool variant_is_half_populated(void); + #endif /*__BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/google/rex/variants/baseboard/rex/Makefile.inc b/src/mainboard/google/rex/variants/baseboard/rex/Makefile.inc index 6c29346..7d1f886 100644 --- a/src/mainboard/google/rex/variants/baseboard/rex/Makefile.inc +++ b/src/mainboard/google/rex/variants/baseboard/rex/Makefile.inc @@ -1,5 +1,6 @@ bootblock-y += gpio.c
romstage-y += gpio.c +romstage-y += memory.c
ramstage-y += gpio.c diff --git a/src/mainboard/google/rex/variants/baseboard/rex/memory.c b/src/mainboard/google/rex/variants/baseboard/rex/memory.c new file mode 100644 index 0000000..c10d470 --- /dev/null +++ b/src/mainboard/google/rex/variants/baseboard/rex/memory.c @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <gpio.h> + +static const struct mb_cfg baseboard_memcfg = { + .type = MEM_TYPE_LP5X, + + .rcomp = { + /* Baseboard uses only 100ohm Rcomp resistors */ + .resistor = 100, + + /* Baseboard Rcomp target values */ + .targets = {40, 30, 30, 30, 30}, + }, + + .ect = 1, /* Enable Early Command Training */ +}; + +const struct mb_cfg *__weak variant_memory_params(void) +{ + return &baseboard_memcfg; +} + +int __weak variant_memory_sku(void) +{ + return 0; +} + +bool __weak variant_is_half_populated(void) +{ + return 0; +} + +void __weak variant_get_spd_info(struct mem_spd *spd_info) +{ + spd_info->topo = MEM_TOPO_MEMORY_DOWN; + spd_info->cbfs_index = variant_memory_sku(); +} diff --git a/src/mainboard/google/rex/variants/rex0/memory/Makefile.inc b/src/mainboard/google/rex/variants/rex0/memory/Makefile.inc new file mode 100644 index 0000000..0016256 --- /dev/null +++ b/src/mainboard/google/rex/variants/rex0/memory/Makefile.inc @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! + +SPD_SOURCES = +SPD_SOURCES += spd/lp5/set-0/spd-empty.hex # ID = 0(0b0000) diff --git a/src/mainboard/google/rex/variants/rex0/memory/dram_id.generated.txt b/src/mainboard/google/rex/variants/rex0/memory/dram_id.generated.txt new file mode 100644 index 0000000..a329cca --- /dev/null +++ b/src/mainboard/google/rex/variants/rex0/memory/dram_id.generated.txt @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! + +DRAM Part Name ID to assign +empty 0 (0000) + diff --git a/src/mainboard/google/rex/variants/rex0/memory/mem_parts_used.txt b/src/mainboard/google/rex/variants/rex0/memory/mem_parts_used.txt new file mode 100644 index 0000000..c8a24cc --- /dev/null +++ b/src/mainboard/google/rex/variants/rex0/memory/mem_parts_used.txt @@ -0,0 +1,6 @@ +MT53E512M32D2NP-046 WT:F +H9HCNNNBKMMLXR-NEE +MT53E1G32D2NP-046 WT:A +MT53E2G32D4NQ-046 WT:A +H9HCNNNCPMMLXR-NEE +MT53E1G32D2NP-046 WT:B
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Eric Lai (Code Review)