Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/23027 )
Change subject: mb/solidrun/solidpc: Do initial commit ......................................................................
Patch Set 12:
(8 comments)
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... File src/mainboard/solidrun/solidpc/Kconfig:
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... PS12, Line 6: ENABLE_BUILTIN_COM1 Not used on braswell (but should be implemented like on ~baytrail)
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... PS12, Line 28: 126 128?
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... File src/mainboard/solidrun/solidpc/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... PS12, Line 20: romstage bootblock?
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... File src/mainboard/solidrun/solidpc/boardid.c:
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... PS12, Line 1: /* : * This file is part of the coreboot project. : * : * Copyright(C) 2013 Google Inc. : * Copyright (C) 2015 Intel Corp. : * Copyright (C) 2017 Andreas Galauner andreas@galauner.de : * Copyright (C) 2018 3mdeb Embedded Systems Consulting : * : * This program is free software; you can redistribute it and/or modify : * it under the terms of the GNU General Public License as published by : * the Free Software Foundation; version 2 of the License. : * : * This program is distributed in the hope that it will be useful, : * but WITHOUT ANY WARRANTY; without even the implied warranty of : * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the : * GNU General Public License for more details. : */ : : #include <boardid.h> : #include <stdlib.h> : : uint32_t board_id(void) : { : MAYBE_STATIC int id = -1; : : return (uint32_t) id; : } This is a weak function in coreboot_table.c to do this.
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... File src/mainboard/solidrun/solidpc/com_init.c:
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... PS12, Line 26: : uint32_t *pad_config_reg; : : /* Enable the UART hardware for COM1. */ : pci_write_config32(PCI_DEV(0, LPC_DEV, 0), UART_CONT, 1); : : /* : * Set up the pads to select the UART function : * AD12 SW16(UART1_DATAIN/UART0_DATAIN) - Setting Mode 2 for UART0_RXD : * AD10 SW20(UART1_DATAOUT/UART0_DATAOUT) - Setting Mode 2 for UART0_TXD : */ : pad_config_reg = gpio_pad_config_reg(GP_SOUTHWEST, UART1_RXD_PAD); : write32(pad_config_reg, SET_PAD_MODE_SELECTION(PAD_CONFIG0_DEFAULT0, : M2)); : : pad_config_reg = gpio_pad_config_reg(GP_SOUTHWEST, UART1_TXD_PAD); : write32(pad_config_reg, SET_PAD_MODE_SELECTION(PAD_CONFIG0_DEFAULT0, : M2)); This should probably not be in the MB dir.
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... File src/mainboard/solidrun/solidpc/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... PS12, Line 45: Device (RP03) : { : Name (_ADR, 0x001C0002) // _ADR: Address : OperationRegion(RPXX, PCI_Config, 0x00, 0x10) : } copied? unused?
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... File src/mainboard/solidrun/solidpc/smihandler.c:
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... PS12, Line 32: int mainboard_io_trap_handler(int smif) : { : switch (smif) { : case 0x99: : printk(BIOS_DEBUG, "Sample\n"); : smm_get_gnvs()->smif = 0; : break; : default: : return 0; : } : : /* : * On success, the IO Trap Handler returns 0 : * On failure, the IO Trap Handler returns a value != 0 : * : * For now, we force the return value to 0 and log all traps to : * see what's going on. : */ : //gnvs->smif = 0; : return 1; : } : : /* : * The entire 32-bit ALT_GPIO_SMI register is passed as a parameter. Note, that : * this includes the enable bits in the lower 16 bits. : */ : void mainboard_smi_gpi(uint32_t alt_gpio_smi) : { : } remove?
https://review.coreboot.org/c/coreboot/+/23027/12/src/mainboard/solidrun/sol... PS12, Line 75: : int mainboard_smi_apmc(uint8_t apmc) : { : switch (apmc) { : case APM_CNT_ACPI_ENABLE: : break; : case APM_CNT_ACPI_DISABLE: : break; : } : return 0; : } remove