New patch to review for coreboot: eb43738 veyron_brain: Remove unused USB GPIOs

[Patrick Georgi]

Patrick Georgi ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10305

-gerrit

commit eb43738b8e0bae6469e00305348b6b0b7d71fddf
Author: David Hendricks 
Date:   Thu May 14 20:02:23 2015 -0700

veyron_brain: Remove unused USB GPIOs

Brain doesn't have HOST1_PWR_EN (GPIO0_B3) and 5V_DRV (GPIO7_C5).
    The only USB power enable pin connected to the AP is USB2_PWR_EN
    (GPIO0_B4) which controls power for both the physical type-A ports.

BUG=none
    BRANCH=none
    TEST=built and booted on Brain, both USB host mode ports work

Change-Id: Iea371926c7dcd111aa2e671a15fe97a3519bfc04
    Signed-off-by: Patrick Georgi 
    Original-Commit-Id: 4db71095a5116666cd27aedb09b4f02557362346
    Original-Change-Id: Ibbb4b9b424156eb3db1ccfdd948050c1c067ad3c
    Original-Signed-off-by: David Hendricks 
    Original-Reviewed-on: https://chromium-review.googlesource.com/271309
    Original-Reviewed-by: Julius Werner 
---
 src/mainboard/google/veyron_brain/mainboard.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/mainboard/google/veyron_brain/mainboard.c b/src/mainboard/google/veyron_brain/mainboard.c
index 4aa4770..a5c40c23 100644
--- a/src/mainboard/google/veyron_brain/mainboard.c
+++ b/src/mainboard/google/veyron_brain/mainboard.c
@@ -43,9 +43,7 @@

static void configure_usb(void)
 {
-	gpio_output(GPIO(0, B, 3), 1);			/* HOST1_PWR_EN */
-	gpio_output(GPIO(0, B, 4), 1);			/* USBOTG_PWREN_H */
-	gpio_output(GPIO(7, C, 5), 1);			/* 5V_DRV */
+	gpio_output(GPIO(0, B, 4), 1);		/* USB2_PWR_EN */
 }

static void configure_emmc(void)