[S] Change in coreboot[main]: Documentation/mb/asus/p8z77-m: Document latest test results

[Angel Pons (Code Review)]

Attention is currently required from: Keith Hui, Kevin Keijzer, Paul Menzel.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78204?usp=email )

Change subject: Documentation/mb/asus/p8z77-m: Document latest test results
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Patch Set 2:

(1 comment)

File Documentation/mainboard/asus/p8z77-m.md:

https://review.coreboot.org/c/coreboot/+/78204/comment/26047048_955ee8ed :
PS2, Line 106: It appears all memory modules rated for DDR3-1600 will fail to boot if
             :   max_mem_clock_mhz is set to 800 in devicetree.
> A little off topic, do we know enough about Ivy Bridge that we can try automatically downclock the m […]

@Kevin do you have a Sandy or Ivy Bridge CPU? It matters - native RAM init skips some steps on Sandy.

@Keith I've been thinking about how to implement a "when raminit fails at high clock speed, try again but with a lower clock speed" mechanism. Because you can only set the memory controller frequency once, I would need to use the SSKPD (sticky scratchpad) register to store the high clock speed (which didn't work), do a warm reset (to unset the memory controller frequency) and try again with the lower clock speed.