Attention is currently required from: Christian Walter, Tim Wawrzynczak, Maximilian Brune, Angel Pons, Lean Sheng Tan, David Milosevic.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68756 )
Change subject: src/soc/intel/alderlake: Add IBECC to Alderlake
......................................................................
Patch Set 5:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68756/comment/67b21940_f466ce52
PS5, Line 7: Alderlake
Alder Lake, but it’s redundant as it’s in the prefix.
https://review.coreboot.org/c/coreboot/+/68756/comment/1e483e4a_f8224da9
PS5, Line 10: Board
board?
https://review.coreboot.org/c/coreboot/+/68756/comment/9355f93e_ea9181a7
PS5, Line 11:
Please elaborate. Is the FSP doing that?
Please add how and with what memory modules you tested this.
Patchset:
PS5:
Should something be logged, when this is enabled?
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