Usha P has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38940 )
Change subject: cpu/x86/name: Making name.c file available in romstage ......................................................................
cpu/x86/name: Making name.c file available in romstage
In this patch name.c file that includes the definition for fill_processor_name which is used by the report_cpu_info function is been made available in romstage.
This is done to facilitate the report_platform_info to be called from romstage, as the intension is to move the report_platform_info to romstage for all S0C's due to the bootblock size constraint.
BUG=None TEST=Build and boot APL, GLK and CNL platforms.
Change-Id: Ifd6d4b80c2e07d02adaed676a56efeb6fb704552 Signed-off-by: Usha P usha.p@intel.com --- M src/cpu/x86/name/Makefile.inc 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/38940/1
diff --git a/src/cpu/x86/name/Makefile.inc b/src/cpu/x86/name/Makefile.inc index 944c18f..02b5863 100644 --- a/src/cpu/x86/name/Makefile.inc +++ b/src/cpu/x86/name/Makefile.inc @@ -12,4 +12,5 @@ ##
bootblock-y += name.c +romstage-y += name.c ramstage-y += name.c
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38940 )
Change subject: cpu/x86/name: Making name.c file available in romstage ......................................................................
Patch Set 1: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38940 )
Change subject: cpu/x86/name: Making name.c file available in romstage ......................................................................
Patch Set 1:
(4 comments)
https://review.coreboot.org/c/coreboot/+/38940/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38940/1//COMMIT_MSG@7 PS1, Line 7: Making Please use imperative mood: Make
https://review.coreboot.org/c/coreboot/+/38940/1//COMMIT_MSG@14 PS1, Line 14: intension intention
https://review.coreboot.org/c/coreboot/+/38940/1//COMMIT_MSG@15 PS1, Line 15: S0C SOC’s
https://review.coreboot.org/c/coreboot/+/38940/1//COMMIT_MSG@9 PS1, Line 9: In this patch name.c file that includes the definition for : fill_processor_name which is used by the report_cpu_info : function is been made available in romstage. : : This is done to facilitate the report_platform_info to be called : from romstage, as the intension is to move the report_platform_info : to romstage for all S0C's due to the bootblock size constraint. Please re-flow for 75 characters text width.
Hello Subrata Banik, Aamir Bohra, Rizwan Qureshi, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38940
to look at the new patch set (#2).
Change subject: cpu/x86/name: Make name.c file available in romstage ......................................................................
cpu/x86/name: Make name.c file available in romstage
In this patch, name.c file that includes the function definition for fill_processor_name which is used by the report_cpu_info function is been made available in romstage.
This is done to facilitate the report_platform_info to be called from romstage, as the intention is to move the report_platform_info to romstage for all SOC's due to the bootblock size constraint.
BUG=None TEST=Build and boot APL, GLK and CNL platforms.
Change-Id: Ifd6d4b80c2e07d02adaed676a56efeb6fb704552 Signed-off-by: Usha P usha.p@intel.com --- M src/cpu/x86/name/Makefile.inc 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/38940/2
Usha P has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38940 )
Change subject: cpu/x86/name: Make name.c file available in romstage ......................................................................
Patch Set 2:
(4 comments)
https://review.coreboot.org/c/coreboot/+/38940/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38940/1//COMMIT_MSG@7 PS1, Line 7: Making
Please use imperative mood: Make
Done
https://review.coreboot.org/c/coreboot/+/38940/1//COMMIT_MSG@14 PS1, Line 14: intension
intention
Done
https://review.coreboot.org/c/coreboot/+/38940/1//COMMIT_MSG@9 PS1, Line 9: In this patch name.c file that includes the definition for : fill_processor_name which is used by the report_cpu_info : function is been made available in romstage. : : This is done to facilitate the report_platform_info to be called : from romstage, as the intension is to move the report_platform_info : to romstage for all S0C's due to the bootblock size constraint.
Please re-flow for 75 characters text width.
Done
https://review.coreboot.org/c/coreboot/+/38940/1//COMMIT_MSG@15 PS1, Line 15: S0C
SOC’s
Done
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38940 )
Change subject: cpu/x86/name: Make name.c file available in romstage ......................................................................
cpu/x86/name: Make name.c file available in romstage
In this patch, name.c file that includes the function definition for fill_processor_name which is used by the report_cpu_info function is been made available in romstage.
This is done to facilitate the report_platform_info to be called from romstage, as the intention is to move the report_platform_info to romstage for all SOC's due to the bootblock size constraint.
BUG=None TEST=Build and boot APL, GLK and CNL platforms.
Change-Id: Ifd6d4b80c2e07d02adaed676a56efeb6fb704552 Signed-off-by: Usha P usha.p@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38940 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subrata.banik@intel.com --- M src/cpu/x86/name/Makefile.inc 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved
diff --git a/src/cpu/x86/name/Makefile.inc b/src/cpu/x86/name/Makefile.inc index 944c18f..02b5863 100644 --- a/src/cpu/x86/name/Makefile.inc +++ b/src/cpu/x86/name/Makefile.inc @@ -12,4 +12,5 @@ ##
bootblock-y += name.c +romstage-y += name.c ramstage-y += name.c