[M] Change in coreboot[master]: src/soc/intel/cmn/fast-spi: Add SSDT extension to fast SPI driver

[Nico Huber (Code Review)]

Attention is currently required from: Werner Zeh.

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64076?usp=email )

Change subject: src/soc/intel/cmn/fast-spi: Add SSDT extension to fast SPI driver
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Patch Set 4:

(1 comment)

File src/soc/intel/common/block/fast_spi/fast_spi.c:

https://review.coreboot.org/c/coreboot/+/64076/comment/3954cbf0_44a24ba8 :
PS4, Line 484: Do
I can only answer the following:
> Why isn't the device marked hidden on APL in the devicetree when it will be hidden at some point?

tl;dr `hidden` in the dt for a PCI device means it's hidden from coreboot. FSP
sometimes does that to us. If coreboot hides a PCI device, but it's visible during
coreboot's PCI enumeration, it should be `on` in the dt.

Historically, the `hidden` keyword accumulated (to my knowledge) three different
semantics:
1. The original intention seemed to be to hide a device (never implemented, abandoned).
2. Marking a device as hidden from the UI in ACPI.
3. Accepting that a PCI device doesn't show up, because somebody else hid it.

It might be best to start over with two new keywords for 2. and 3.