Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37859 )
Change subject: mainboard/google/puff: Configure HDA registers ......................................................................
mainboard/google/puff: Configure HDA registers
Enable PCH HDA and configure dmic+ssp registers.
BRANCH=none BUG=b:146519004 TEST=./util/abuild/abuild -p none -t google/hatch -x -a
Change-Id: If9495261201ca256cdb35352338c0b3a82a50196 Signed-off-by: Edward O'Callaghan quasisec@google.com --- M src/mainboard/google/hatch/variants/puff/overridetree.cb 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/37859/1
diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb index d791b7f..ab1837f 100644 --- a/src/mainboard/google/hatch/variants/puff/overridetree.cb +++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb @@ -63,6 +63,13 @@ # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39. register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1515"
+ # Intel HDA + register "PchHdaDspEnable" = "1" + register "PchHdaAudioLinkSsp0" = "1" + register "PchHdaAudioLinkSsp1" = "0" + register "PchHdaAudioLinkDmic0" = "0" + register "PchHdaAudioLinkDmic1" = "0" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value |
Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37859 )
Change subject: mainboard/google/puff: Configure HDA registers ......................................................................
Patch Set 1: Code-Review+1
Daniel Kurtz has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37859 )
Change subject: mainboard/google/puff: Configure HDA registers ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37859/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/puff/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/37859/1/src/mainboard/google/hatch/... PS1, Line 66: # Intel HDA Curious, I would have expected this "overridetree.cb" to inherit some of these common registers from the hatch baseboard [0]. Perhaps we just need to disabled Ssp1 & Dmic0 here?
If so, can you also modify the comment to describe exactly what we are doing (cf the comment above the equivalent code block @ [0].
[0] https://cs.corp.google.com/chromeos_public/src/third_party/coreboot/src/main...
Hello Kangheui Won, Shelley Chen, build bot (Jenkins), Patrick Georgi, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37859
to look at the new patch set (#2).
Change subject: mainboard/google/puff: Configure HDA registers ......................................................................
mainboard/google/puff: Configure HDA registers
Enable PCH HDA and configure dmic+ssp registers.
BRANCH=none BUG=b:146519004 TEST=./util/abuild/abuild -p none -t google/hatch -x -a
Change-Id: If9495261201ca256cdb35352338c0b3a82a50196 Signed-off-by: Edward O'Callaghan quasisec@google.com --- M src/mainboard/google/hatch/variants/puff/overridetree.cb 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/37859/2
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37859 )
Change subject: mainboard/google/puff: Configure HDA registers ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37859/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/puff/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/37859/1/src/mainboard/google/hatch/... PS1, Line 66: # Intel HDA
Curious, I would have expected this "overridetree. […]
Your right, and so now that is done. Thanks for the review.
Daniel Kurtz has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37859 )
Change subject: mainboard/google/puff: Configure HDA registers ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37859/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/puff/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/37859/2/src/mainboard/google/hatch/... PS2, Line 71: Intel HDA Can you be a bit more descriptive what you are overriding for puff and why? See the baseboard for a pretty good example comment.
Hello Kangheui Won, Shelley Chen, build bot (Jenkins), Patrick Georgi, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37859
to look at the new patch set (#3).
Change subject: mainboard/google/puff: Configure HDA registers ......................................................................
mainboard/google/puff: Configure HDA registers
Enable PCH HDA and configure dmic+ssp registers.
BRANCH=none BUG=b:146519004 TEST=./util/abuild/abuild -p none -t google/hatch -x -a
Change-Id: If9495261201ca256cdb35352338c0b3a82a50196 Signed-off-by: Edward O'Callaghan quasisec@google.com --- M src/mainboard/google/hatch/variants/puff/overridetree.cb 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/37859/3
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37859 )
Change subject: mainboard/google/puff: Configure HDA registers ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37859/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/puff/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/37859/2/src/mainboard/google/hatch/... PS2, Line 71: Intel HDA
Can you be a bit more descriptive what you are overriding for puff and why? See the baseboard for a […]
Done
Daniel Kurtz has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37859 )
Change subject: mainboard/google/puff: Configure HDA registers ......................................................................
Patch Set 3: Code-Review+2
Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37859 )
Change subject: mainboard/google/puff: Configure HDA registers ......................................................................
mainboard/google/puff: Configure HDA registers
Enable PCH HDA and configure dmic+ssp registers.
BRANCH=none BUG=b:146519004 TEST=./util/abuild/abuild -p none -t google/hatch -x -a
Change-Id: If9495261201ca256cdb35352338c0b3a82a50196 Signed-off-by: Edward O'Callaghan quasisec@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/37859 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Daniel Kurtz djkurtz@google.com --- M src/mainboard/google/hatch/variants/puff/overridetree.cb 1 file changed, 4 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Daniel Kurtz: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb index b99c1f2..342994d 100644 --- a/src/mainboard/google/hatch/variants/puff/overridetree.cb +++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb @@ -68,6 +68,10 @@ # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39. register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1515"
+ # Intel HDA - disable I2S Audio SSP1 and DMIC0 as puff variant does not have them. + register "PchHdaAudioLinkSsp1" = "0" + register "PchHdaAudioLinkDmic0" = "0" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value |