Change in coreboot[master]: soc/mediatek: Fill coreboot table with PCIe info - coreboot-gerrit

1 Apr 2022


      Attention is currently required from: Hung-Te Lin, Jianjun Wang.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63252 )
Change subject: soc/mediatek: Fill coreboot table with PCIe info
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Patch Set 6: Code-Review+1
(1 comment)
File src/soc/mediatek/common/pcie.c:
https://review.coreboot.org/c/coreboot/+/63252/comment/3f690cff_c881cb16 
PS6, Line 216: pci_root_bus
Will this be NULL on devices without NVMe?
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ib2988694f60aac9cbfc09ef9a26d47e01c004406
Gerrit-Change-Number: 63252
Gerrit-PatchSet: 6
Gerrit-Owner: Jianjun Wang jianjun.wang@mediatek.com
Gerrit-Reviewer: Hung-Te Lin hungte@chromium.org
Gerrit-Reviewer: Yu-Ping Wu yupingso@google.com
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