New patch to review for coreboot: 534b0bd southbridge/hudson: Initialize ACPI IO ports separate of FADT

[Alexandru Gagniuc]

Alexandru Gagniuc ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5559

-gerrit

commit 534b0bdd4d6b2a35a75fdc2426940d456a5ed479
Author: Alexandru Gagniuc 
Date:   Sun Apr 20 14:36:29 2014 -0500

southbridge/hudson: Initialize ACPI IO ports separate of FADT

The ACPI IO ports, and the respective SMI (for HAVE_SMI_HANDLER), were
    initialized when the FADT table was written. This works well on a cold
    boot, but the ACPI ports are not initialized on S3 resume, as ACPI
    tables are not written. This will not work on S3 resume if the default
    ports are not what we set them, or if AGESA sets them to some other
    value.

To solve this, move the port configuration to southbridge chip init.

Change-Id: Ib4043f0fa5e20f08d320acd12ce84d4d789cd035
    Signed-off-by: Alexandru Gagniuc 
---
 src/southbridge/amd/agesa/hudson/fadt.c   | 16 ----------------
 src/southbridge/amd/agesa/hudson/hudson.c | 31 +++++++++++++++++++++++++++++++
 2 files changed, 31 insertions(+), 16 deletions(-)

diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c
index fcfbb44..f86016a 100644
--- a/src/southbridge/amd/agesa/hudson/fadt.c
+++ b/src/southbridge/amd/agesa/hudson/fadt.c
@@ -65,9 +65,6 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
    fadt->preferred_pm_profile = FADT_PM_PROFILE;
    fadt->sci_int = 9;		/* HUDSON - IRQ 09 – ACPI SCI */

-	/* We write to this port further down; configure it first */
-	pm_write16(0x62, ACPI_PM1_CNT_BLK);
-
    if (IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)) {
    	fadt->smi_cmd = ACPI_SMI_CTL_PORT;
    	fadt->acpi_enable = ACPI_SMI_CMD_ENABLE;
@@ -75,7 +72,6 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
    	fadt->s4bios_req = 0;	/* Not supported */
    	fadt->pstate_cnt = 0;	/* Not supported */
    	fadt->cst_cnt = 0;	/* Not supported */
-		hudson_enable_acpi_cmd_smi();
    	outl(0x0, ACPI_PM1_CNT_BLK);	/* clear SCI_EN */
    } else {
    	fadt->smi_cmd = 0;	/* disable system management mode */
@@ -87,18 +83,6 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
    	outl(0x1, ACPI_PM1_CNT_BLK);	/* set SCI_EN */
    }

-	pm_write16(0x60, ACPI_PM_EVT_BLK);
-	pm_write16(0x64, ACPI_PM_TMR_BLK);
-	pm_write16(0x68, ACPI_GPE0_BLK);
-	/* CpuControl is in _PR.CPU0, 6 bytes */
-	pm_write16(0x66, ACPI_CPU_CONTROL);
-	pm_write16(0x6a, fadt->smi_cmd);
-
-	pm_write8(0x74, 1<<0 | 1<<1 | 1<<4 | 1<<2); /* AcpiDecodeEnable, When set, SB uses
-					* the contents of the PM registers at
-					* index 60-6B to decode ACPI I/O address.
-					* AcpiSmiEn & SmiCmdEn*/
-
    fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK;
    fadt->pm1b_evt_blk = 0x0000;
    fadt->pm1a_cnt_blk = ACPI_PM1_CNT_BLK;
diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c
index 39dab23..c855b2b 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.c
+++ b/src/southbridge/amd/agesa/hudson/hudson.c
@@ -29,6 +29,7 @@
 #include <cbmem.h>
 #include "hudson.h"
 #include "smbus.h"
+#include "smi.h"

/* Offsets from ACPI_MMIO_BASE
  * This is defined by AGESA, but we don't include AGESA headers to avoid
@@ -129,7 +130,37 @@ unsigned long get_top_of_ram(void)
 }
 #endif

+static void hudson_init_acpi_ports(void)
+{
+	if (!IS_ENABLED(CONFIG_GENERATE_ACPI_TABLES))
+		return;
+
+	pm_write16(0x60, ACPI_PM_EVT_BLK);
+	pm_write16(0x62, ACPI_PM1_CNT_BLK);
+	pm_write16(0x64, ACPI_PM_TMR_BLK);
+	pm_write16(0x68, ACPI_GPE0_BLK);
+	/* CpuControl is in _PR.CPU0, 6 bytes */
+	pm_write16(0x66, ACPI_CPU_CONTROL);
+
+	if (IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)) {
+		pm_write16(0x6a, ACPI_SMI_CTL_PORT);
+		hudson_enable_acpi_cmd_smi();
+	} else {
+		pm_write16(0x6a, 0);
+	}
+
+	/* AcpiDecodeEnable, When set, SB uses the contents of the PM registers
+	 * at index 60-6B to decode ACPI I/O address. AcpiSmiEn & SmiCmdEn*/
+	pm_write8(0x74, 1<<0 | 1<<1 | 1<<4 | 1<<2);
+}
+
+static void hudson_init(void *chip_info)
+{
+	hudson_init_acpi_ports();
+}
+
 struct chip_operations southbridge_amd_agesa_hudson_ops = {
    CHIP_NAME("ATI HUDSON")
    .enable_dev = hudson_enable,
+	.init = hudson_init
 };