Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40014 )
Change subject: util/inteltool: print all Lewisburg GPIO registers ......................................................................
util/inteltool: print all Lewisburg GPIO registers
These changes are in accordance with the documentation: [*] "Intel C620 Series Chipset Platform Controller Hub", datasheet. May 2019. Document Number: 336067-007US
Change-Id: Ib7e4e3884f7b087c08325597650b2f2fd5a6a62f Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M util/inteltool/gpio_names/lewisburg.h 1 file changed, 220 insertions(+), 27 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/40014/1
diff --git a/util/inteltool/gpio_names/lewisburg.h b/util/inteltool/gpio_names/lewisburg.h index 4d59177..d2aba7a 100644 --- a/util/inteltool/gpio_names/lewisburg.h +++ b/util/inteltool/gpio_names/lewisburg.h @@ -4,10 +4,190 @@ #include "gpio_groups.h" #include "sunrise.h"
+static const struct gpiocom_register lewisburg_community0_abf_cfg_registers[] = { + {0x0C, "PADBAR"}, + {0x10, "MISCCFG"}, + {0x20, "PAD_OWN_GPP_A_0"}, + {0x24, "PAD_OWN_GPP_A_1"}, + {0x28, "PAD_OWN_GPP_A_2"}, + {0x2C, "PAD_OWN_GPP_B_0"}, + {0x30, "PAD_OWN_GPP_B_1"}, + {0x34, "PAD_OWN_GPP_B_2"}, + {0x38, "PAD_OWN_GPP_F_0"}, + {0x3C, "PAD_OWN_GPP_F_1"}, + {0x40, "PAD_OWN_GPP_F_2"}, + {0x60, "PADCFGLOCK_GPP_A"}, + {0x64, "PADCFGLOCKTX_GPP_A"}, + {0x68, "PADCFGLOCK_GPP_B"}, + {0x6C, "PADCFGLOCKTX_GPP_B"}, + {0x70, "PADCFGLOCK_GPP_F"}, + {0x74, "PADCFGLOCKTX_GPP_F"}, + {0x80, "HOSTSW_OWN_GPP_A"}, + {0x84, "HOSTSW_OWN_GPP_B"}, + {0x88, "HOSTSW_OWN_GPP_F"}, + {0x100, "GPI_IS_GPP_A"}, + {0x104, "GPI_IS_GPP_B"}, + {0x108, "GPI_IS_GPP_F"}, + {0x110, "GPI_IE_GPP_A"}, + {0x114, "GPI_IE_GPP_B"}, + {0x118, "GPI_IE_GPP_F"}, + {0x120, "GPI_GPE_STS_GPP_A"}, + {0x124, "GPI_GPE_STS_GPP_B"}, + {0x128, "GPI_GPE_STS_GPP_F"}, + {0x130, "GPI_GPE_EN_GPP_A"}, + {0x134, "GPI_GPE_EN_GPP_B"}, + {0x138, "GPI_GPE_EN_GPP_F"}, + {0x144, "GPI_SMI_STS_GPP_B"}, + {0x154, "GPI_SMI_EN_GPP_B"}, + {0x164, "GPI_NMI_STS_GPP_B"}, + {0x174, "GPI_NMI_EN_GPP_B"}, +}; + +static const struct gpiocom_register lewisburg_community1_cde_cfg_registers[] = { + {0x10, "PADBAR"}, + {0x13, "MISCCFG"}, + {0x23, "PAD_OWN_GPP_C_0"}, + {0x24, "PAD_OWN_GPP_C_1"}, + {0x28, "PAD_OWN_GPP_C_2"}, + {0x2C, "PAD_OWN_GPP_D_0"}, + {0x30, "PAD_OWN_GPP_D_1"}, + {0x34, "PAD_OWN_GPP_D_2"}, + {0x38, "PAD_OWN_GPP_E_0"}, + {0x3C, "PAD_OWN_GPP_E_1"}, + {0x60, "PADCFGLOCK_GPP_C_0"}, + {0x64, "PADCFGLOCKTX_GPP_C_0"}, + {0x68, "PADCFGLOCK_GPP_D_0"}, + {0x6C, "PADCFGLOCKTX_GPP_D_0"}, + {0x70, "PADCFGLOCK_GPP_E_0"}, + {0x74, "PADCFGLOCKTX_GPP_E_0"}, + {0x80, "HOSTSW_OWN_GPP_C_0"}, + {0x84, "HOSTSW_OWN_GPP_D_0"}, + {0x88, "HOSTSW_OWN_GPP_E_0"}, + {0x100, "GPI_IS_GPP_C_0"}, + {0x104, "GPI_IS_GPP_D_0"}, + {0x108, "GPI_IS_GPP_E_0"}, + {0x110, "GPI_IE_GPP_C_0"}, + {0x114, "GPI_IE_GPP_D_0"}, + {0x118, "GPI_IE_GPP_E_0"}, + {0x120, "GPI_GPE_STS_GPP_C_0"}, + {0x124, "GPI_GPE_STS_GPP_D_0"}, + {0x128, "GPI_GPE_STS_GPP_E_0"}, + {0x130, "GPI_GPE_EN_GPP_C_0"}, + {0x134, "GPI_GPE_EN_GPP_D_0"}, + {0x138, "GPI_GPE_EN_GPP_E_0"}, + {0x140, "GPI_SMI_STS_GPP_C_0"}, + {0x144, "GPI_SMI_STS_GPP_D_0"}, + {0x148, "GPI_SMI_STS_GPP_E_0"}, + {0x150, "GPI_SMI_EN_GPP_C_0"}, + {0x154, "GPI_SMI_EN_GPP_D_0"}, + {0x158, "GPI_SMI_EN_GPP_E_0"}, + {0x160, "GPI_NMI_STS_GPP_C_0"}, + {0x164, "GPI_NMI_STS_GPP_D_0"}, + {0x168, "GPI_NMI_STS_GPP_E_0"}, + {0x170, "GPI_NMI_EN_GPP_C_0"}, + {0x174, "GPI_NMI_EN_GPP_D_0"}, + {0x178, "GPI_NMI_EN_GPP_E_0"}, + {0x204, "PWMC"}, + {0x20C, "GP_SER_BLINK"}, + {0x210, "GP_SER_CMDSTS"}, + {0x214, "GP_SER_DATA"}, +}; + +static const struct gpiocom_register lewisburg_community2_gpd_cfg_registers[] = { + {0x0C, "PADBAR"}, + {0x10, "MISCCFG"}, + {0x20, "PAD_OWN_GPD_0"}, + {0x24, "PAD_OWN_GPD_1"}, + {0x60, "PADCFGLOCK_GPD_0"}, + {0x64, "PADCFGLOCKTX_GPD_0"}, + {0x80, "HOSTSW_OWN_GPD_0"}, + {0x100, "GPI_IS_GPD_0"}, + {0x110, "GPI_IE_GPD_0"}, + {0x120, "GPI_GPE_STS_GPD_0"}, + {0x130, "GPI_GPE_EN_GPD_0"}, +}; + +static const struct gpiocom_register lewisburg_community3_i_cfg_registers[] = { + {0xC0, "PADBAR"}, + {0x10, "MISCCFG"}, + {0x20, "PAD_OWN_GPP_I_0"}, + {0x24, "PAD_OWN_GPP_I_1"}, + {0x60, "PADCFGLOCK_GPP_I_0"}, + {0x64, "PADCFGLOCKTX_GPP_I_0"}, + {0x80, "HOSTSW_OWN_GPP_I_0"}, + {0x100, "GPI_IS_GPP_I_0"}, + {0x110, "GPI_IE_GPP_I_0"}, + {0x120, "GPI_GPE_STS_GPP_I_0"}, + {0x130, "GPI_GPE_EN_GPP_I_0"}, + {0x140, "GPI_SMI_STS_GPP_I_0"}, + {0x150, "GPI_SMI_EN_GPP_I_0"}, + {0x160, "GPI_NMI_STS_GPP_I_0"}, + {0x170, "GPI_NMI_EN_GPP_I_0"}, +}; + +static const struct gpiocom_register lewisburg_community4_jk_cfg_registers[] = { + {0x0C, "PADBAR"}, + {0x10, "MISCCFG"}, + {0x20, "PAD_OWN_GPP_J_0"}, + {0x24, "PAD_OWN_GPP_J_1"}, + {0x28, "PAD_OWN_GPP_J_2"}, + {0x2C, "PAD_OWN_GPP_K_0"}, + {0x30, "PAD_OWN_GPP_K_1"}, + {0x60, "PADCFGLOCK_GPP_J"}, + {0x64, "PADCFGLOCKTX_GPP_J"}, + {0x68, "PADCFGLOCK_GPP_K"}, + {0x6C, "PADCFGLOCKTX_GPP_K"}, + {0x80, "HOSTSW_OWN_GPP_J"}, + {0x84, "HOSTSW_OWN_GPP_K"}, + {0x100, "GPI_IS_GPP_J"}, + {0x104, "GPI_IS_GPP_K"}, + {0x110, "GPI_IE_GPP_J"}, + {0x114, "GPI_IE_GPP_K"}, + {0x120, "GPI_GPE_STS_GPP_J"}, + {0x124, "GPI_GPE_STS_GPP_K"}, + {0x130, "GPI_GPE_EN_GPP_J"}, + {0x134, "GPI_GPE_EN_GPP_K"}, +}; + +static const struct gpiocom_register lewisburg_community5_jk_cfg_registers[] = { + {0x0C, "PADBAR"}, + {0x10, "MISCCFG"}, + {0x20, "PAD_OWN_GPP_G_0"}, + {0x24, "PAD_OWN_GPP_G_1"}, + {0x28, "PAD_OWN_GPP_G_2"}, + {0x2C, "PAD_OWN_GPP_H_0"}, + {0x30, "PAD_OWN_GPP_H_1"}, + {0x34, "PAD_OWN_GPP_H_2"}, + {0x38, "PAD_OWN_GPP_L_0"}, + {0x3C, "PAD_OWN_GPP_L_1"}, + {0x40, "PAD_OWN_GPP_L_2"}, + {0x60, "PADCFGLOCK_GPP_G"}, + {0x64, "PADCFGLOCKTX_GPP_G"}, + {0x68, "PADCFGLOCK_GPP_H"}, + {0x6C, "PADCFGLOCKTX_GPP_H"}, + {0x70, "PADCFGLOCK_GPP_L"}, + {0x74, "PADCFGLOCKTX_GPP_L"}, + {0x80, "HOSTSW_OWN_GPP_G"}, + {0x84, "HOSTSW_OWN_GPP_H"}, + {0x88, "HOSTSW_OWN_GPP_L"}, + {0x100, "GPI_IS_GPP_G"}, + {0x104, "GPI_IS_GPP_H"}, + {0x108, "GPI_IS_GPP_L"}, + {0x110, "GPI_IE_GPP_G"}, + {0x114, "GPI_IE_GPP_H"}, + {0x118, "GPI_IE_GPP_L"}, + {0x120, "GPI_GPE_STS_GPP_G"}, + {0x124, "GPI_GPE_STS_GPP_H"}, + {0x128, "GPI_GPE_STS_GPP_L"}, + {0x130, "GPI_GPE_EN_GPP_G"}, + {0x134, "GPI_GPE_EN_GPP_H"}, + {0x138, "GPI_GPE_EN_GPP_L"}, +}; + static const char *const lewisburg_group_a_names[] = { - "GPP_A0", "RCIN#", "n/a", "ESPI_ALERT1#", - "GPP_A1", "LAD0", "n/a", "ESPI_IO0", - "GPP_A2", "LAD1", "n/a", "ESPI_IO1", + "GPP_,A0", "RCIN#", "n/a", "ESPI_ALERT1#", + "GPP_,A1", "LAD0", "n/a", "ESPI_IO0", + "GPP_,A2", "LAD1", "n/a", "ESPI_IO1", "GPP_A3", "LAD2", "n/a", "ESPI_IO2", "GPP_A4", "LAD3", "n/a", "ESPI_IO3", "GPP_A5", "LFRAME#", "n/a", "ESPI_CS0#", @@ -384,10 +564,12 @@ };
static const struct gpio_community lewisburg_community0_abf = { - .name = "------- GPIO Community 0 -------", - .pcr_port_id = 0xaf, - .group_count = ARRAY_SIZE(lewisburg_community0_abf_groups), - .groups = lewisburg_community0_abf_groups, + .name = "------- GPIO Community 0 -------", + .pcr_port_id = 0xaf, + .groups = lewisburg_community0_abf_groups, + .group_count = ARRAY_SIZE(lewisburg_community0_abf_groups), + .cfg_registers = lewisburg_community0_abf_cfg_registers, + .cfg_registers_count = ARRAY_SIZE(lewisburg_community0_abf_cfg_registers), };
static const struct gpio_group *const lewisburg_community1_cde_groups[] = { @@ -397,10 +579,12 @@ };
static const struct gpio_community lewisburg_community1_cde = { - .name = "------- GPIO Community 1 -------", - .pcr_port_id = 0xae, - .group_count = ARRAY_SIZE(lewisburg_community1_cde_groups), - .groups = lewisburg_community1_cde_groups, + .name = "------- GPIO Community 1 -------", + .pcr_port_id = 0xae, + .groups = lewisburg_community1_cde_groups, + .group_count = ARRAY_SIZE(lewisburg_community1_cde_groups), + .cfg_registers = lewisburg_community1_cde_cfg_registers, + .cfg_registers_count = ARRAY_SIZE(lewisburg_community1_cde_cfg_registers), };
static const struct gpio_group *const lewisburg_community2_gpd_groups[] = { @@ -408,10 +592,12 @@ };
static const struct gpio_community lewisburg_community2_gpd = { - .name = "------- GPIO Community 2 -------", - .pcr_port_id = 0xad, - .group_count = ARRAY_SIZE(lewisburg_community2_gpd_groups), - .groups = lewisburg_community2_gpd_groups, + .name = "------- GPIO Community 2 -------", + .pcr_port_id = 0xad, + .groups = lewisburg_community2_gpd_groups, + .group_count = ARRAY_SIZE(lewisburg_community2_gpd_groups), + .cfg_registers = lewisburg_community2_gpd_cfg_registers, + .cfg_registers_count = ARRAY_SIZE(lewisburg_community2_gpd_cfg_registers), };
static const struct gpio_group *const lewisburg_community3_i_groups[] = { @@ -419,10 +605,12 @@ };
static const struct gpio_community lewisburg_community3_i = { - .name = "------- GPIO Community 3 -------", - .pcr_port_id = 0xac, - .group_count = ARRAY_SIZE(lewisburg_community3_i_groups), - .groups = lewisburg_community3_i_groups, + .name = "------- GPIO Community 3 -------", + .pcr_port_id = 0xac, + .groups = lewisburg_community3_i_groups, + .group_count = ARRAY_SIZE(lewisburg_community3_i_groups), + .cfg_registers = lewisburg_community3_i_cfg_registers, + .cfg_registers_count = ARRAY_SIZE(lewisburg_community3_i_cfg_registers), };
static const struct gpio_group *const lewisburg_community4_jk_groups[] = { @@ -431,10 +619,12 @@ };
static const struct gpio_community lewisburg_community4_jk = { - .name = "------- GPIO Community 4 -------", - .pcr_port_id = 0xab, - .group_count = ARRAY_SIZE(lewisburg_community4_jk_groups), - .groups = lewisburg_community4_jk_groups, + .name = "------- GPIO Community 4 -------", + .pcr_port_id = 0xab, + .groups = lewisburg_community4_jk_groups, + .group_count = ARRAY_SIZE(lewisburg_community4_jk_groups), + .cfg_registers = lewisburg_community4_jk_cfg_registers, + .cfg_registers_count = ARRAY_SIZE(lewisburg_community4_jk_cfg_registers), };
static const struct gpio_group *const lewisburg_community5_ghl_groups[] = { @@ -444,10 +634,13 @@ };
static const struct gpio_community lewisburg_community5_ghl = { - .name = "------- GPIO Community 5 -------", - .pcr_port_id = 0x11, - .group_count = ARRAY_SIZE(lewisburg_community5_ghl_groups), - .groups = lewisburg_community5_ghl_groups, + .name = "------- GPIO Community 5 -------", + .pcr_port_id = 0x11, + .groups = lewisburg_community5_ghl_groups, + .group_count = ARRAY_SIZE(lewisburg_community5_ghl_groups), + .cfg_registers = lewisburg_community4_jk_cfg_registers, + .cfg_registers_count = ARRAY_SIZE(lewisburg_community4_jk_cfg_registers), + };
static const struct gpio_community *const lewisburg_communities[] = {
Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40014 )
Change subject: util/inteltool: print all Lewisburg GPIO registers ......................................................................
Patch Set 3:
This change is ready for review.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40014 )
Change subject: util/inteltool: print all Lewisburg GPIO registers ......................................................................
Patch Set 3: Code-Review+2
Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40014 )
Change subject: util/inteltool: print all Lewisburg GPIO registers ......................................................................
Patch Set 3:
Patch Set 3: Code-Review+2
Thanks for the review
This should be added only after the CB:39511
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40014 )
Change subject: util/inteltool: print all Lewisburg GPIO registers ......................................................................
Patch Set 3: Code-Review+1
I will have to rework some parts of my loooong patch trail, as soon as I have some time. This looks good, though :-)
Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/40014?usp=email )
Change subject: util/inteltool: print all Lewisburg GPIO registers ......................................................................
Abandoned