Aaron Durbin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44527 )
Change subject: elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE ......................................................................
elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE
The wake source macro for GPE events was using 'GPIO'. However, current usage is really all GPEs. Therefore, provide clarity in the naming in order to allow for proper GPIO wake events that are separate from the ACPI GPE block.
BUG=b:159947207
Change-Id: I27d0ab439c58b1658ed39158eddb1213c24d328f Signed-off-by: Aaron Durbin adurbin@chromium.org --- M src/include/elog.h M src/soc/amd/common/block/acpi/acpi.c M src/soc/intel/apollolake/elog.c M src/soc/intel/baytrail/elog.c M src/soc/intel/braswell/elog.c M src/soc/intel/broadwell/elog.c M src/soc/intel/cannonlake/elog.c M src/soc/intel/icelake/elog.c M src/soc/intel/jasperlake/elog.c M src/soc/intel/skylake/elog.c M src/soc/intel/tigerlake/elog.c M src/southbridge/intel/bd82x6x/elog.c M src/southbridge/intel/lynxpoint/elog.c 13 files changed, 16 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/44527/1
diff --git a/src/include/elog.h b/src/include/elog.h index 6c2c531..89079de 100644 --- a/src/include/elog.h +++ b/src/include/elog.h @@ -79,7 +79,7 @@ #define ELOG_WAKE_SOURCE_PME 0x01 #define ELOG_WAKE_SOURCE_PME_INTERNAL 0x02 #define ELOG_WAKE_SOURCE_RTC 0x03 -#define ELOG_WAKE_SOURCE_GPIO 0x04 +#define ELOG_WAKE_SOURCE_GPE 0x04 #define ELOG_WAKE_SOURCE_SMBUS 0x05 #define ELOG_WAKE_SOURCE_PWRBTN 0x06 #define ELOG_WAKE_SOURCE_PME_HDA 0x07 diff --git a/src/soc/amd/common/block/acpi/acpi.c b/src/soc/amd/common/block/acpi/acpi.c index 2d75ec0..4ca6599 100644 --- a/src/soc/amd/common/block/acpi/acpi.c +++ b/src/soc/amd/common/block/acpi/acpi.c @@ -90,7 +90,7 @@
for (i = 0; i <= 31; i++) { if (valid_gpe & (1U << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); } }
diff --git a/src/soc/intel/apollolake/elog.c b/src/soc/intel/apollolake/elog.c index 408017f..3e82c32 100644 --- a/src/soc/intel/apollolake/elog.c +++ b/src/soc/intel/apollolake/elog.c @@ -18,7 +18,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
diff --git a/src/soc/intel/baytrail/elog.c b/src/soc/intel/baytrail/elog.c index 75c080d..7e92e90 100644 --- a/src/soc/intel/baytrail/elog.c +++ b/src/soc/intel/baytrail/elog.c @@ -68,7 +68,7 @@ i = 0; while (gpio_mask) { if (gpio_mask & gpe0_sts) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); gpio_mask <<= 1; i++; } diff --git a/src/soc/intel/braswell/elog.c b/src/soc/intel/braswell/elog.c index 75c080d..7e92e90 100644 --- a/src/soc/intel/braswell/elog.c +++ b/src/soc/intel/braswell/elog.c @@ -68,7 +68,7 @@ i = 0; while (gpio_mask) { if (gpio_mask & gpe0_sts) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); gpio_mask <<= 1; i++; } diff --git a/src/soc/intel/broadwell/elog.c b/src/soc/intel/broadwell/elog.c index f918958..9271e27 100644 --- a/src/soc/intel/broadwell/elog.c +++ b/src/soc/intel/broadwell/elog.c @@ -16,7 +16,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
@@ -48,7 +48,7 @@
/* GPIO27 */ if (ps->gpe0_sts[GPE_STD] & GP27_STS) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, 27); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, 27);
/* Log GPIO events in set 1-3 */ pch_log_gpio_gpe(ps->gpe0_sts[GPE_31_0], ps->gpe0_en[GPE_31_0], 0); diff --git a/src/soc/intel/cannonlake/elog.c b/src/soc/intel/cannonlake/elog.c index 9fa725e..3600d76 100644 --- a/src/soc/intel/cannonlake/elog.c +++ b/src/soc/intel/cannonlake/elog.c @@ -97,7 +97,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
diff --git a/src/soc/intel/icelake/elog.c b/src/soc/intel/icelake/elog.c index 4727fbf..235dc6e 100644 --- a/src/soc/intel/icelake/elog.c +++ b/src/soc/intel/icelake/elog.c @@ -16,7 +16,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
diff --git a/src/soc/intel/jasperlake/elog.c b/src/soc/intel/jasperlake/elog.c index 4727fbf..235dc6e 100644 --- a/src/soc/intel/jasperlake/elog.c +++ b/src/soc/intel/jasperlake/elog.c @@ -16,7 +16,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c index 550ee41..dee93d8 100644 --- a/src/soc/intel/skylake/elog.c +++ b/src/soc/intel/skylake/elog.c @@ -22,7 +22,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
diff --git a/src/soc/intel/tigerlake/elog.c b/src/soc/intel/tigerlake/elog.c index b38d316..84f0a7e 100644 --- a/src/soc/intel/tigerlake/elog.c +++ b/src/soc/intel/tigerlake/elog.c @@ -16,7 +16,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
diff --git a/src/southbridge/intel/bd82x6x/elog.c b/src/southbridge/intel/bd82x6x/elog.c index c130958..684f830 100644 --- a/src/southbridge/intel/bd82x6x/elog.c +++ b/src/southbridge/intel/bd82x6x/elog.c @@ -87,7 +87,7 @@ /* GPIO 0-15 */ for (i = 0; i < 16; i++) { if ((gpe0_sts & (1 << (16+i))) && (gpe0_en & (1 << (16+i)))) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); }
/* SMBUS Wake */ diff --git a/src/southbridge/intel/lynxpoint/elog.c b/src/southbridge/intel/lynxpoint/elog.c index 2e4df72..8146794 100644 --- a/src/southbridge/intel/lynxpoint/elog.c +++ b/src/southbridge/intel/lynxpoint/elog.c @@ -36,7 +36,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
@@ -64,7 +64,7 @@ gpe0_sts = inw(pmbase + GPE0_STS + 2) & gpe0_en; for (i = 0; i <= 15; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); }
/* @@ -78,7 +78,7 @@ if (!gpe0_high_gpios[i]) continue; if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, gpe0_high_gpios[i]); } }
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44527 )
Change subject: elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE ......................................................................
Patch Set 1: Code-Review+2
Hello build bot (Jenkins), Furquan Shaikh, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44527
to look at the new patch set (#2).
Change subject: elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE ......................................................................
elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE
The wake source macro for GPE events was using 'GPIO'. However, current usage is really all GPEs. Therefore, provide clarity in the naming in order to allow for proper GPIO wake events that are separate from the ACPI GPE block.
BUG=b:159947207
Change-Id: I27d0ab439c58b1658ed39158eddb1213c24d328f Signed-off-by: Aaron Durbin adurbin@chromium.org --- M src/include/elog.h M src/soc/amd/common/block/acpi/acpi.c M src/soc/intel/apollolake/elog.c M src/soc/intel/baytrail/elog.c M src/soc/intel/braswell/elog.c M src/soc/intel/broadwell/elog.c M src/soc/intel/cannonlake/elog.c M src/soc/intel/icelake/elog.c M src/soc/intel/jasperlake/elog.c M src/soc/intel/skylake/elog.c M src/soc/intel/tigerlake/elog.c M src/southbridge/intel/bd82x6x/elog.c M src/southbridge/intel/lynxpoint/elog.c 13 files changed, 16 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/44527/2
Aaron Durbin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44527 )
Change subject: elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE ......................................................................
elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE
The wake source macro for GPE events was using 'GPIO'. However, current usage is really all GPEs. Therefore, provide clarity in the naming in order to allow for proper GPIO wake events that are separate from the ACPI GPE block.
BUG=b:159947207
Change-Id: I27d0ab439c58b1658ed39158eddb1213c24d328f Signed-off-by: Aaron Durbin adurbin@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/44527 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/include/elog.h M src/soc/amd/common/block/acpi/acpi.c M src/soc/intel/apollolake/elog.c M src/soc/intel/baytrail/elog.c M src/soc/intel/braswell/elog.c M src/soc/intel/broadwell/elog.c M src/soc/intel/cannonlake/elog.c M src/soc/intel/icelake/elog.c M src/soc/intel/jasperlake/elog.c M src/soc/intel/skylake/elog.c M src/soc/intel/tigerlake/elog.c M src/southbridge/intel/bd82x6x/elog.c M src/southbridge/intel/lynxpoint/elog.c 13 files changed, 16 insertions(+), 16 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/include/elog.h b/src/include/elog.h index 6c2c531..89079de 100644 --- a/src/include/elog.h +++ b/src/include/elog.h @@ -79,7 +79,7 @@ #define ELOG_WAKE_SOURCE_PME 0x01 #define ELOG_WAKE_SOURCE_PME_INTERNAL 0x02 #define ELOG_WAKE_SOURCE_RTC 0x03 -#define ELOG_WAKE_SOURCE_GPIO 0x04 +#define ELOG_WAKE_SOURCE_GPE 0x04 #define ELOG_WAKE_SOURCE_SMBUS 0x05 #define ELOG_WAKE_SOURCE_PWRBTN 0x06 #define ELOG_WAKE_SOURCE_PME_HDA 0x07 diff --git a/src/soc/amd/common/block/acpi/acpi.c b/src/soc/amd/common/block/acpi/acpi.c index 2d75ec0..4ca6599 100644 --- a/src/soc/amd/common/block/acpi/acpi.c +++ b/src/soc/amd/common/block/acpi/acpi.c @@ -90,7 +90,7 @@
for (i = 0; i <= 31; i++) { if (valid_gpe & (1U << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); } }
diff --git a/src/soc/intel/apollolake/elog.c b/src/soc/intel/apollolake/elog.c index 408017f..3e82c32 100644 --- a/src/soc/intel/apollolake/elog.c +++ b/src/soc/intel/apollolake/elog.c @@ -18,7 +18,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
diff --git a/src/soc/intel/baytrail/elog.c b/src/soc/intel/baytrail/elog.c index 75c080d..7e92e90 100644 --- a/src/soc/intel/baytrail/elog.c +++ b/src/soc/intel/baytrail/elog.c @@ -68,7 +68,7 @@ i = 0; while (gpio_mask) { if (gpio_mask & gpe0_sts) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); gpio_mask <<= 1; i++; } diff --git a/src/soc/intel/braswell/elog.c b/src/soc/intel/braswell/elog.c index 75c080d..7e92e90 100644 --- a/src/soc/intel/braswell/elog.c +++ b/src/soc/intel/braswell/elog.c @@ -68,7 +68,7 @@ i = 0; while (gpio_mask) { if (gpio_mask & gpe0_sts) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); gpio_mask <<= 1; i++; } diff --git a/src/soc/intel/broadwell/elog.c b/src/soc/intel/broadwell/elog.c index f918958..9271e27 100644 --- a/src/soc/intel/broadwell/elog.c +++ b/src/soc/intel/broadwell/elog.c @@ -16,7 +16,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
@@ -48,7 +48,7 @@
/* GPIO27 */ if (ps->gpe0_sts[GPE_STD] & GP27_STS) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, 27); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, 27);
/* Log GPIO events in set 1-3 */ pch_log_gpio_gpe(ps->gpe0_sts[GPE_31_0], ps->gpe0_en[GPE_31_0], 0); diff --git a/src/soc/intel/cannonlake/elog.c b/src/soc/intel/cannonlake/elog.c index 9fa725e..3600d76 100644 --- a/src/soc/intel/cannonlake/elog.c +++ b/src/soc/intel/cannonlake/elog.c @@ -97,7 +97,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
diff --git a/src/soc/intel/icelake/elog.c b/src/soc/intel/icelake/elog.c index 4727fbf..235dc6e 100644 --- a/src/soc/intel/icelake/elog.c +++ b/src/soc/intel/icelake/elog.c @@ -16,7 +16,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
diff --git a/src/soc/intel/jasperlake/elog.c b/src/soc/intel/jasperlake/elog.c index 4727fbf..235dc6e 100644 --- a/src/soc/intel/jasperlake/elog.c +++ b/src/soc/intel/jasperlake/elog.c @@ -16,7 +16,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c index 550ee41..dee93d8 100644 --- a/src/soc/intel/skylake/elog.c +++ b/src/soc/intel/skylake/elog.c @@ -22,7 +22,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
diff --git a/src/soc/intel/tigerlake/elog.c b/src/soc/intel/tigerlake/elog.c index b38d316..84f0a7e 100644 --- a/src/soc/intel/tigerlake/elog.c +++ b/src/soc/intel/tigerlake/elog.c @@ -16,7 +16,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
diff --git a/src/southbridge/intel/bd82x6x/elog.c b/src/southbridge/intel/bd82x6x/elog.c index c130958..684f830 100644 --- a/src/southbridge/intel/bd82x6x/elog.c +++ b/src/southbridge/intel/bd82x6x/elog.c @@ -87,7 +87,7 @@ /* GPIO 0-15 */ for (i = 0; i < 16; i++) { if ((gpe0_sts & (1 << (16+i))) && (gpe0_en & (1 << (16+i)))) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); }
/* SMBUS Wake */ diff --git a/src/southbridge/intel/lynxpoint/elog.c b/src/southbridge/intel/lynxpoint/elog.c index 2e4df72..8146794 100644 --- a/src/southbridge/intel/lynxpoint/elog.c +++ b/src/southbridge/intel/lynxpoint/elog.c @@ -36,7 +36,7 @@
for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } }
@@ -64,7 +64,7 @@ gpe0_sts = inw(pmbase + GPE0_STS + 2) & gpe0_en; for (i = 0; i <= 15; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); }
/* @@ -78,7 +78,7 @@ if (!gpe0_high_gpios[i]) continue; if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, gpe0_high_gpios[i]); } }
-
Aaron Durbin (Code Review) -
Furquan Shaikh (Code Review)