Change in coreboot[master]: sc7180: Trogdor to support 2 dcb

[Shelley Chen (Code Review)]

Shelley Chen has submitted this change. ( https://review.coreboot.org/c/coreboot/+/64244 )

Change subject: sc7180: Trogdor to support 2 dcb
......................................................................

sc7180: Trogdor to support 2 dcb

BUG=b:227946776
TEST=Validated on sc7180 Lazor board

Signed-off-by: Sudheer Kumar Amrabadi 
Change-Id: Ie4d7f7f0b24aee06ffb272b21b74fea4160fe87c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64244
Tested-by: build bot (Jenkins) 
Reviewed-by: Julius Werner 
---
M src/soc/qualcomm/sc7180/Makefile.inc
A src/soc/qualcomm/sc7180/qclib.c
2 files changed, 35 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Julius Werner: Looks good to me, approved

diff --git a/src/soc/qualcomm/sc7180/Makefile.inc b/src/soc/qualcomm/sc7180/Makefile.inc
index cbdc5b3..c8d7f2f 100644
--- a/src/soc/qualcomm/sc7180/Makefile.inc
+++ b/src/soc/qualcomm/sc7180/Makefile.inc
@@ -27,6 +27,7 @@
 romstage-y += cbmem.c
 romstage-y += watchdog.c
 romstage-y += ../common/qclib.c
+romstage-y += qclib.c
 romstage-y += ../common/mmu.c
 romstage-y += mmu.c
 romstage-y += ../common/usb/usb.c
@@ -97,6 +98,14 @@
 cbfs-files-y += $(DCB_CBFS)

################################################################################
+DCB_LONGSYS1P8_FILE := $(SC7180_BLOB)/boot/dcb_slow.bin
+DCB_LONGSYS1P8_CBFS := $(CONFIG_CBFS_PREFIX)/dcb_longsys1p8
+$(DCB_LONGSYS1P8_CBFS)-file := $(DCB_LONGSYS1P8_FILE)
+$(DCB_LONGSYS1P8_CBFS)-type := raw
+$(DCB_LONGSYS1P8_CBFS)-compression := $(CBFS_COMPRESS_FLAG)
+cbfs-files-y += $(DCB_LONGSYS1P8_CBFS)
+
+################################################################################
 AOP_FILE := $(SC7180_BLOB)/aop/aop.mbn
 AOP_CBFS := $(CONFIG_CBFS_PREFIX)/aop
 $(AOP_CBFS)-file := $(AOP_FILE)
diff --git a/src/soc/qualcomm/sc7180/qclib.c b/src/soc/qualcomm/sc7180/qclib.c
new file mode 100644
index 0000000..e05a24f
--- /dev/null
+++ b/src/soc/qualcomm/sc7180/qclib.c
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <console/console.h>
+#include <soc/qclib_common.h>
+#include <device/mmio.h>
+
+#define LONG_SYS_DCB_REG 0x7801C0
+#define FUSE_BIT 15
+
+static int dcb_fuse_longsys1p8(void)
+{
+	unsigned int fuse_value, bit_value;
+	fuse_value = read32((unsigned int *)LONG_SYS_DCB_REG);
+	bit_value = (fuse_value >> FUSE_BIT) & 0x1;
+	return bit_value;
+}
+
+const char *qclib_file(enum qclib_cbfs_file file)
+{
+	if ((file == QCLIB_CBFS_DCB) && dcb_fuse_longsys1p8()) {
+		printk(BIOS_INFO, "Using DCB for Longsys 1.8V memory based on fuse setting\n");
+		return CONFIG_CBFS_PREFIX "/dcb_longsys1p8";
+	} else {
+		return qclib_file_default(file);
+	}
+}

9 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.