Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61414 )
Change subject: mb/siemens/mc_ehl2: Disable SATA ......................................................................
mb/siemens/mc_ehl2: Disable SATA
With latest hardware revision SATA interface is no longer used on this mainboard. The mainboard is still in development and not yet released and for this reason there may still be adjustments.
Change-Id: Icbf088ce4c907e207f6f5d11b8bf5556fe2c90d6 Signed-off-by: Mario Scheithauer mario.scheithauer@siemens.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/61414 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Werner Zeh werner.zeh@siemens.com --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb 1 file changed, 1 insertion(+), 9 deletions(-)
Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index acb9286..4982384 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -77,13 +77,7 @@ register "PcieRpLtrDisable[4]" = "true" register "PcieRpLtrDisable[6]" = "true"
- # Storage (SATA/SDCARD/EMMC) related UPDs - register "SataSalpSupport" = "0" - register "SataPortsEnable[0]" = "0" - register "SataPortsEnable[1]" = "1" - register "SataPortsDevSlp[0]" = "0" - register "SataPortsDevSlp[1]" = "0" - + # Storage (SDCARD/EMMC) related UPDs register "ScsEmmcHs400Enabled" = "1" register "ScsEmmcDdr50Enabled" = "1" register "SdCardPowerEnableActiveHigh" = "1" @@ -155,8 +149,6 @@
device pci 16.0 hidden end # Management Engine Interface 1
- device pci 17.0 on end # SATA - device pci 19.0 on end # I2C4 device pci 19.1 on end # I2C5 device pci 19.2 on end # UART2
-
Felix Held (Code Review)