[M] Change in coreboot[master]: soc/amd/*: Fix UART ACPI device status

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/77092?usp=email )

Change subject: soc/amd/*: Fix UART ACPI device status
......................................................................

soc/amd/*: Fix UART ACPI device status

Prior to commit d1c0f958d198 ("acpi: Call acpi_fill_ssdt() only for
enabled devices), uart_inject_ssdt() was used to set the ACPI status
(_STA) for both enabled and disabled devices. The aforementioned commit
limited it to being called only on enabled devices, which left disabled
devices without any _STA method at all -- which the OS assumes means
that the device is present and enabled.

To fix this, create the _STA method in the UART asl code for each port,
and set the return value to a name variable (STAT) which defaults to
0 (not present/disabled). Then, have uart_inject_ssdt() set STAT to
present and enabled (0xF) for UARTs actually present on the board.

TEST=build/boot google/skyrim (frostflow), dump ACPI tables, and verify
that _STA returns 0xF only for UARTs enabled in devicetree.

Change-Id: Id89e74c3ea7f53280935898ee35311b7cf3b152a
Signed-off-by: Matt DeVillier 
---
M src/soc/amd/cezanne/acpi/mmio.asl
M src/soc/amd/common/block/uart/uart.c
M src/soc/amd/glinda/acpi/mmio.asl
M src/soc/amd/mendocino/acpi/mmio.asl
M src/soc/amd/phoenix/acpi/mmio.asl
M src/soc/amd/picasso/acpi/mmio.asl
M src/soc/amd/stoneyridge/acpi/mmio.asl
7 files changed, 133 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/77092/1

diff --git a/src/soc/amd/cezanne/acpi/mmio.asl b/src/soc/amd/cezanne/acpi/mmio.asl
index e73c423..722f32d 100644
--- a/src/soc/amd/cezanne/acpi/mmio.asl
+++ b/src/soc/amd/cezanne/acpi/mmio.asl
@@ -87,6 +87,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
 }

@@ -118,6 +124,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
 }

diff --git a/src/soc/amd/common/block/uart/uart.c b/src/soc/amd/common/block/uart/uart.c
index 96b9883..7d76d75 100644
--- a/src/soc/amd/common/block/uart/uart.c
+++ b/src/soc/amd/common/block/uart/uart.c
@@ -67,13 +67,12 @@
    	return NULL;
 }

-/* This gets called for both enabled and disabled devices. */
+/* This gets called for enabled devices only. */
 static void uart_inject_ssdt(const struct device *dev)
 {
+
    acpigen_write_scope(acpi_device_path(dev));
-
-	acpigen_write_STA(acpi_device_status(dev));
-
+	acpigen_write_store_int_to_namestr(acpi_device_status(dev), "STAT");
    acpigen_pop_len(); /* Scope */
 }
 #endif
diff --git a/src/soc/amd/glinda/acpi/mmio.asl b/src/soc/amd/glinda/acpi/mmio.asl
index 1aeb3d8..eb1f1d9 100644
--- a/src/soc/amd/glinda/acpi/mmio.asl
+++ b/src/soc/amd/glinda/acpi/mmio.asl
@@ -89,6 +89,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
 }

@@ -120,6 +126,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
 }

@@ -151,6 +163,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART2, 0)
 }

@@ -182,6 +200,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0)
 }

@@ -213,6 +237,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART4, 0)
 }

diff --git a/src/soc/amd/mendocino/acpi/mmio.asl b/src/soc/amd/mendocino/acpi/mmio.asl
index 983ad59..5c364d8 100644
--- a/src/soc/amd/mendocino/acpi/mmio.asl
+++ b/src/soc/amd/mendocino/acpi/mmio.asl
@@ -89,6 +89,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
 }

@@ -120,6 +126,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
 }

@@ -151,6 +163,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART2, 0)
 }

@@ -182,6 +200,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0)
 }

@@ -213,6 +237,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART4, 0)
 }

diff --git a/src/soc/amd/phoenix/acpi/mmio.asl b/src/soc/amd/phoenix/acpi/mmio.asl
index 37c926c..f5b27d1 100644
--- a/src/soc/amd/phoenix/acpi/mmio.asl
+++ b/src/soc/amd/phoenix/acpi/mmio.asl
@@ -89,6 +89,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
 }

@@ -120,6 +126,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
 }

@@ -151,6 +163,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART2, 0)
 }

@@ -182,6 +200,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0)
 }

@@ -213,6 +237,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART4, 0)
 }

diff --git a/src/soc/amd/picasso/acpi/mmio.asl b/src/soc/amd/picasso/acpi/mmio.asl
index c229284..86733c1 100644
--- a/src/soc/amd/picasso/acpi/mmio.asl
+++ b/src/soc/amd/picasso/acpi/mmio.asl
@@ -124,6 +124,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
 }

@@ -157,6 +163,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
 }

@@ -190,6 +202,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART2, 0)
 }

@@ -223,6 +241,12 @@
    	}
    }

+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
    AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0)
 }

diff --git a/src/soc/amd/stoneyridge/acpi/mmio.asl b/src/soc/amd/stoneyridge/acpi/mmio.asl
index ef2b4ea..362b9f5 100644
--- a/src/soc/amd/stoneyridge/acpi/mmio.asl
+++ b/src/soc/amd/stoneyridge/acpi/mmio.asl
@@ -47,9 +47,10 @@
    	IRQ (Edge, ActiveHigh, Exclusive) { 10 }
    	Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x2000)
    })
+	Name (STAT, 0x0)
    Method (_STA, 0x0, NotSerialized)
    {
-		Return (0x0F)
+		Return (STAT)
    }
 }

@@ -61,9 +62,10 @@
    		IRQ (Edge, ActiveHigh, Exclusive) { 11 }
    		Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x2000)
    })
+	Name (STAT, 0x0)
    Method (_STA, 0x0, NotSerialized)
    {
-			Return (0x0F)
+		Return (STAT)
    }
 }