Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46314 )
Change subject: soc/intel/skylake: Add chipset devicetree
......................................................................
Patch Set 7: Code-Review+1
(2 comments)
https://review.coreboot.org/c/coreboot/+/46314/6/src/soc/intel/skylake/chips...
File src/soc/intel/skylake/chipset.cb:
https://review.coreboot.org/c/coreboot/+/46314/6/src/soc/intel/skylake/chips...
PS6, Line 10:
device pci 07.0 alias chap off end # CHAP
https://review.coreboot.org/c/coreboot/+/46314/6/src/soc/intel/skylake/chips...
PS6, Line 61: pch_spi
maybe fast_spi like in TGL?
--
To view, visit
https://review.coreboot.org/c/coreboot/+/46314
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic4dbd965c84c3679e42a181dea0e7e618c12fb97
Gerrit-Change-Number: 46314
Gerrit-PatchSet: 7
Gerrit-Owner: Felix Singer
felixsinger@posteo.net
Gerrit-Reviewer: Furquan Shaikh
furquan@google.com
Gerrit-Reviewer: Michael Niewöhner
foss@mniewoehner.de
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Mon, 30 Nov 2020 20:23:46 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment