[XS] Change in coreboot[master]: mb/google/rex/var/screebo: Remove `SAGV_POINTS_0_1_2` workaround

[Wentao Qin (Code Review)]

Wentao Qin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78313?usp=email )

Change subject: mb/google/rex/var/screebo: Remove `SAGV_POINTS_0_1_2` workaround
......................................................................

mb/google/rex/var/screebo: Remove `SAGV_POINTS_0_1_2` workaround

Remove SaGvWpMask to SAGV_POINTS_0_1_2 in dev tree because need to
determine whether the issue in mtl-staging-MTL.3323.92 has been improved
in the QS sample in the factory build.

BUG=b:287170545
TEST=Able to idle for more than 5+ hours without any hang.

Change-Id: Ia533262d2a1fcdcbdc5619f70724a03834718773
Signed-off-by: Wentao Qin 
---
M src/mainboard/google/rex/variants/screebo/overridetree.cb
1 file changed, 0 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/78313/1

diff --git a/src/mainboard/google/rex/variants/screebo/overridetree.cb b/src/mainboard/google/rex/variants/screebo/overridetree.cb
index 2088a92..63c753e 100644
--- a/src/mainboard/google/rex/variants/screebo/overridetree.cb
+++ b/src/mainboard/google/rex/variants/screebo/overridetree.cb
@@ -47,9 +47,6 @@
    # Temporary setting TCC of 80C = Tj max (110) - TCC_Offset (30)
    register "tcc_offset" = "30"

-	# TODO(b/287170545): workaround avoid DUT random hang
-	register "sagv_wp_bitmap" = "SAGV_POINTS_0_1_2"
-
    # Enable Display Port Configuration
    register "ddi_ports_config" = "{
    	[DDI_PORT_A] = DDI_ENABLE_HPD,