Change in coreboot[master]: soc/intel/alderlake: Add support for UFS controller

[Meera Ravindranath (Code Review)]

Attention is currently required from: Subrata Banik, Wonkyu Kim, Kangheui Won, Tim Wawrzynczak, Paul Menzel, Rizwan Qureshi, Angel Pons, Eric Lai, Lean Sheng Tan.
Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62856 )

Change subject: soc/intel/alderlake: Add support for UFS controller
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Patch Set 5:

(5 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/62856/comment/85bf7b48_50ec3f6d 
PS1, Line 8:
> AIUI, UFS is the successor of eMMC

Done

Commit Message:

https://review.coreboot.org/c/coreboot/+/62856/comment/76ffca50_bbeb9ebe 
PS2, Line 10: Enable UFS controller 1 UPD in fsp params.
> suggestion: […]

Done

File src/soc/intel/alderlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/62856/comment/ea489c86_07477824 
PS2, Line 620: 	/* UFS */
> That was quick, thanks Eric :) What do you think of the other comment I raised on chipset. […]

I will get back on this, Sheng. In discussion with FSP team as to why the array exists at the first place when we clearly have 1 controller. We could rename it if they would like to proceed with the array.

https://review.coreboot.org/c/coreboot/+/62856/comment/fa74818d_a329a9a6 
PS2, Line 625: 		s_cfg->UfsEnable[1] = dev->enabled;
> I would also explicitly mark UFS UPD index 0 as `0` to make sure it's marked disable […]

Done

https://review.coreboot.org/c/coreboot/+/62856/comment/4128e937_6a530200 
PS2, Line 622: if (!dev)
             : 		s_cfg->UfsEnable[1] = 0;
             : 	else
             : 		s_cfg->UfsEnable[1] = dev->enabled;
             :
> Or what I suggested in the other comment thread: […]

Ack