Change in coreboot[master]: soc/amd/cezanne/chip.h: add DPTC and tablet mode options

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54073 )

Change subject: soc/amd/cezanne/chip.h: add DPTC and tablet mode options
......................................................................

soc/amd/cezanne/chip.h: add DPTC and tablet mode options

Signed-off-by: Felix Held 
Change-Id: I39218b79a79f1ccaf1a58408c6bb5161acea64aa
---
M src/soc/amd/cezanne/chip.h
1 file changed, 8 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/54073/1

diff --git a/src/soc/amd/cezanne/chip.h b/src/soc/amd/cezanne/chip.h
index 244f2ba..e770670 100644
--- a/src/soc/amd/cezanne/chip.h
+++ b/src/soc/amd/cezanne/chip.h
@@ -75,6 +75,14 @@
    uint32_t telemetry_vddcrsocfull_scale_current_mA;
    uint32_t telemetry_vddcrsocoffset;

+	/* Enable dptc for tablet mode (0 = disable, 1 = enable) */
+	uint8_t dptc_enable;
+
+	/* STAPM Configuration for tablet mode (need enable dptc_enable first) */
+	uint32_t fast_ppt_limit_tablet_mode_mW;
+	uint32_t slow_ppt_limit_tablet_mode_mW;
+	uint32_t sustained_power_limit_tablet_mode_mW;
+	uint32_t thermctl_limit_tablet_mode_degreeC;
 };

#endif /* CEZANNE_CHIP_H */