Change in ...coreboot[master]: mb/lenovo/t420s/romstage: Remove unused include byteorder.h

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Peter Lemenkov (Code Review)

15 Jun 2019 15 Jun '19

8:31 p.m.

Peter Lemenkov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33511

Change subject: mb/lenovo/t420s/romstage: Remove unused include byteorder.h ......................................................................

mb/lenovo/t420s/romstage: Remove unused include byteorder.h

Change-Id: I3e500aafd26b7524a6782883b9a30f55b544102d Signed-off-by: Peter Lemenkov lemenkov@gmail.com --- M src/mainboard/lenovo/t420s/romstage.c 1 file changed, 0 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/33511/1

diff --git a/src/mainboard/lenovo/t420s/romstage.c b/src/mainboard/lenovo/t420s/romstage.c index c42d165..9c51713 100644 --- a/src/mainboard/lenovo/t420s/romstage.c +++ b/src/mainboard/lenovo/t420s/romstage.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */

-#include <arch/byteorder.h> #include <device/pci_ops.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h>

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Peter Lemenkov (Code Review)

15 Jun 15 Jun

8:39 p.m.

New subject: Change in ...coreboot[master]: mb/lenovo/*/romstage: Remove unused include byteorder.h

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33511

to look at the new patch set (#2).

Change subject: mb/lenovo/*/romstage: Remove unused include byteorder.h ......................................................................

mb/lenovo/*/romstage: Remove unused include byteorder.h

Change-Id: I3e500aafd26b7524a6782883b9a30f55b544102d Signed-off-by: Peter Lemenkov lemenkov@gmail.com --- M src/mainboard/lenovo/s230u/romstage.c M src/mainboard/lenovo/t420s/romstage.c M src/mainboard/lenovo/t430s/variants/t430s/romstage.c M src/mainboard/lenovo/t430s/variants/t431s/romstage.c M src/mainboard/lenovo/t520/romstage.c M src/mainboard/lenovo/t530/romstage.c M src/mainboard/lenovo/x1_carbon_gen1/romstage.c M src/mainboard/lenovo/x220/romstage.c M src/mainboard/lenovo/x230/romstage.c 9 files changed, 0 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/33511/2

Arthur Heymans (Code Review)

8:44 p.m.

New subject: Change in ...coreboot[master]: mb/lenovo/*/romstage: Remove unused include byteorder.h

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33511 )

Change subject: mb/lenovo/*/romstage: Remove unused include byteorder.h ......................................................................

Patch Set 2: Code-Review+2

Feel free to remove this from other mainboards needlessly including it.

-- To view, visit https://review.coreboot.org/c/coreboot/+/33511 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e500aafd26b7524a6782883b9a30f55b544102d Gerrit-Change-Number: 33511 Gerrit-PatchSet: 2 Gerrit-Owner: Peter Lemenkov lemenkov@gmail.com Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Sat, 15 Jun 2019 18:44:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Angel Pons (Code Review)

16 Jun 16 Jun

2:36 a.m.

New subject: Change in ...coreboot[master]: mb/lenovo/*/romstage: Remove unused include byteorder.h

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33511 )

Change subject: mb/lenovo/*/romstage: Remove unused include byteorder.h ......................................................................

Patch Set 3: Code-Review+1

-- To view, visit https://review.coreboot.org/c/coreboot/+/33511 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e500aafd26b7524a6782883b9a30f55b544102d Gerrit-Change-Number: 33511 Gerrit-PatchSet: 3 Gerrit-Owner: Peter Lemenkov lemenkov@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Sun, 16 Jun 2019 00:36:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

HAOUAS Elyes (Code Review)

1:13 p.m.

New subject: Change in ...coreboot[master]: mb/lenovo/*/romstage: Remove unused include byteorder.h

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33511 )

Change subject: mb/lenovo/*/romstage: Remove unused include byteorder.h ......................................................................

Patch Set 3: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/33511 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e500aafd26b7524a6782883b9a30f55b544102d Gerrit-Change-Number: 33511 Gerrit-PatchSet: 3 Gerrit-Owner: Peter Lemenkov lemenkov@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Sun, 16 Jun 2019 11:13:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Nico Huber (Code Review)

19 Jun 19 Jun

2:28 p.m.

New subject: Change in ...coreboot[master]: mb/lenovo/*/romstage: Remove unused include byteorder.h

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33511 )

Change subject: mb/lenovo/*/romstage: Remove unused include byteorder.h ......................................................................

mb/lenovo/*/romstage: Remove unused include byteorder.h

Change-Id: I3e500aafd26b7524a6782883b9a30f55b544102d Signed-off-by: Peter Lemenkov lemenkov@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/33511 Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: HAOUAS Elyes ehaouas@noos.fr Reviewed-by: Arthur Heymans arthur@aheymans.xyz Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/lenovo/s230u/romstage.c M src/mainboard/lenovo/t420s/romstage.c M src/mainboard/lenovo/t430s/variants/t430s/romstage.c M src/mainboard/lenovo/t430s/variants/t431s/romstage.c M src/mainboard/lenovo/t520/romstage.c M src/mainboard/lenovo/t530/romstage.c M src/mainboard/lenovo/x1_carbon_gen1/romstage.c M src/mainboard/lenovo/x220/romstage.c M src/mainboard/lenovo/x230/romstage.c 9 files changed, 0 insertions(+), 9 deletions(-)

Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve

diff --git a/src/mainboard/lenovo/s230u/romstage.c b/src/mainboard/lenovo/s230u/romstage.c index 03ee4db..32a3cc2 100644 --- a/src/mainboard/lenovo/s230u/romstage.c +++ b/src/mainboard/lenovo/s230u/romstage.c @@ -16,7 +16,6 @@ #include <stdint.h> #include <string.h> #include <cbfs.h> -#include <arch/byteorder.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <console/console.h> diff --git a/src/mainboard/lenovo/t420s/romstage.c b/src/mainboard/lenovo/t420s/romstage.c index c42d165..9c51713 100644 --- a/src/mainboard/lenovo/t420s/romstage.c +++ b/src/mainboard/lenovo/t420s/romstage.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */

-#include <arch/byteorder.h> #include <device/pci_ops.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> diff --git a/src/mainboard/lenovo/t430s/variants/t430s/romstage.c b/src/mainboard/lenovo/t430s/variants/t430s/romstage.c index 5bc7b80..84bd447 100644 --- a/src/mainboard/lenovo/t430s/variants/t430s/romstage.c +++ b/src/mainboard/lenovo/t430s/variants/t430s/romstage.c @@ -16,7 +16,6 @@ */

#include <option.h> -#include <arch/byteorder.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <northbridge/intel/sandybridge/raminit_native.h> diff --git a/src/mainboard/lenovo/t430s/variants/t431s/romstage.c b/src/mainboard/lenovo/t430s/variants/t431s/romstage.c index 7591f8b..e7b43db 100644 --- a/src/mainboard/lenovo/t430s/variants/t431s/romstage.c +++ b/src/mainboard/lenovo/t430s/variants/t431s/romstage.c @@ -16,7 +16,6 @@ */

#include <option.h> -#include <arch/byteorder.h> #include <device/pci_def.h> #include <console/console.h> #include <cbfs.h> diff --git a/src/mainboard/lenovo/t520/romstage.c b/src/mainboard/lenovo/t520/romstage.c index 96d07fe..ebff37f 100644 --- a/src/mainboard/lenovo/t520/romstage.c +++ b/src/mainboard/lenovo/t520/romstage.c @@ -16,7 +16,6 @@ */

#include <stdint.h> -#include <arch/byteorder.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <northbridge/intel/sandybridge/sandybridge.h> diff --git a/src/mainboard/lenovo/t530/romstage.c b/src/mainboard/lenovo/t530/romstage.c index 2b850a2..24e2d9c 100644 --- a/src/mainboard/lenovo/t530/romstage.c +++ b/src/mainboard/lenovo/t530/romstage.c @@ -16,7 +16,6 @@ */

#include <stdint.h> -#include <arch/byteorder.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <northbridge/intel/sandybridge/raminit_native.h> diff --git a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c index c65060f..a951fbc 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c +++ b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c @@ -18,7 +18,6 @@

#include <stdint.h> #include <string.h> -#include <arch/byteorder.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <cpu/x86/lapic.h> diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c index a5b0c81..5f9a931 100644 --- a/src/mainboard/lenovo/x220/romstage.c +++ b/src/mainboard/lenovo/x220/romstage.c @@ -16,7 +16,6 @@ */

#include <stdint.h> -#include <arch/byteorder.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <cpu/x86/lapic.h> diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c index f97c3f5..3f31141 100644 --- a/src/mainboard/lenovo/x230/romstage.c +++ b/src/mainboard/lenovo/x230/romstage.c @@ -16,7 +16,6 @@ */

#include <stdint.h> -#include <arch/byteorder.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <cpu/x86/lapic.h>

-- To view, visit https://review.coreboot.org/c/coreboot/+/33511 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e500aafd26b7524a6782883b9a30f55b544102d Gerrit-Change-Number: 33511 Gerrit-PatchSet: 5 Gerrit-Owner: Peter Lemenkov lemenkov@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-MessageType: merged

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Angel Pons (Code Review)
Arthur Heymans (Code Review)
HAOUAS Elyes (Code Review)
Nico Huber (Code Review)
Peter Lemenkov (Code Review)