Wenbin Mei has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47008 )
Change subject: mb/google/asurada: Configure pins mode for SD ......................................................................
mb/google/asurada: Configure pins mode for SD
Configure the pins for SD to msdc1 mode and change the driving value to 8mA. Enable VCC and VCCQ power supply for SD.
Signed-off-by: Wenbin Mei wenbin.mei@mediatek.com Change-Id: I11151c659b251db987f797a6ae4a08a07971144b --- M src/mainboard/google/asurada/mainboard.c 1 file changed, 25 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/47008/1
diff --git a/src/mainboard/google/asurada/mainboard.c b/src/mainboard/google/asurada/mainboard.c index f7521fe..ac94662 100644 --- a/src/mainboard/google/asurada/mainboard.c +++ b/src/mainboard/google/asurada/mainboard.c @@ -8,6 +8,7 @@ #include <soc/gpio.h> #include <soc/spm.h> #include <soc/usb.h> +#include <soc/regulator.h>
#include "gpio.h"
@@ -16,7 +17,15 @@ #define MSDC0_DRV_MASK 0x3fffffff #define MSDC1_DRV_MASK 0x3ffff000 #define MSDC0_DRV_VALUE 0x24924924 -#define MSDC1_DRV_VALUE 0x24924000 +#define MSDC1_DRV_VALUE 0x1b6db000 + +#define MSDC1_GPIO_MODE0_BASE 0x10005360 +#define MSDC1_GPIO_MODE0_MASK 0x77777000 +#define MSDC1_GPIO_MODE0_VALUE 0x11111000 + +#define MSDC1_GPIO_MODE1_BASE 0x10005370 +#define MSDC1_GPIO_MODE1_MASK 0x7 +#define MSDC1_GPIO_MODE1_VALUE 0x1
static void register_reset_to_bl31(void) { @@ -59,6 +68,9 @@ static void configure_sdcard(void) { void *gpio_base = (void *)IOCFG_RM_BASE; + void *gpio_mode0_base = (void *)MSDC1_GPIO_MODE0_BASE; + void *gpio_mode1_base = (void *)MSDC1_GPIO_MODE1_BASE; + uint8_t enable = 1; int i;
const gpio_t sdcard_pu_pin[] = { @@ -77,8 +89,19 @@ for (i = 0; i < ARRAY_SIZE(sdcard_pd_pin); i++) gpio_set_pull(sdcard_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN);
- /* set sdcard cmd/dat/clk pins driving to 10mA */ + /* set sdcard cmd/dat/clk pins driving to 8mA */ clrsetbits32(gpio_base, MSDC1_DRV_MASK, MSDC1_DRV_VALUE); + + /* set sdcard dat2/dat0/dat3/cmd/clk pins to msdc1 mode */ + clrsetbits32(gpio_mode0_base, MSDC1_GPIO_MODE0_MASK, MSDC1_GPIO_MODE0_VALUE); + + /* set sdcard dat1 pin to msdc1 mode */ + clrsetbits32(gpio_mode1_base, MSDC1_GPIO_MODE1_MASK, MSDC1_GPIO_MODE1_VALUE); + + if (!mainboard_regulator_is_enabled(MTK_REGULATOR_VCC)) + mainboard_enable_requlator(MTK_REGULATOR_VCC, enable); + if (!mainboard_regulator_is_enabled(MTK_REGULATOR_VCCQ)) + mainboard_enable_requlator(MTK_REGULATOR_VCCQ, enable); }
static void mainboard_init(struct device *dev)
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47008 )
Change subject: mb/google/asurada: Configure pins mode for SD ......................................................................
Patch Set 1:
@yidi please add this into ToT.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47008 )
Change subject: mb/google/asurada: Configure pins mode for SD ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/47008/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/47008/1//COMMIT_MSG@11 PS1, Line 11: Enable VCC and VCCQ power supply for SD. Either start a new paragraph (by adding a blank line before this), or merge into the previous line.
https://review.coreboot.org/c/coreboot/+/47008/1/src/mainboard/google/asurad... File src/mainboard/google/asurada/mainboard.c:
https://review.coreboot.org/c/coreboot/+/47008/1/src/mainboard/google/asurad... PS1, Line 11: #include <soc/regulator.h> Please sort these.
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47008 )
Change subject: mb/google/asurada: Configure pins mode for SD ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47008/1/src/mainboard/google/asurad... File src/mainboard/google/asurada/mainboard.c:
https://review.coreboot.org/c/coreboot/+/47008/1/src/mainboard/google/asurad... PS1, Line 101: if (!mainboard_regulator_is_enabled(MTK_REGULATOR_VCC)) : mainboard_enable_requlator(MTK_REGULATOR_VCC, enable); : if (!mainboard_regulator_is_enabled(MTK_REGULATOR_VCCQ)) : mainboard_enable_requlator(MTK_REGULATOR_VCCQ, enable); will there be problems if we just call mainboard_enable_regulator without checking if it's already enabled?
or just do the check inside mainboard_enable_regulator?
Yidi Lin has uploaded a new patch set (#2) to the change originally created by Wenbin Mei. ( https://review.coreboot.org/c/coreboot/+/47008 )
Change subject: mb/google/asurada: Configure pins mode for SD ......................................................................
mb/google/asurada: Configure pins mode for SD
Configure the pins for SD to msdc1 mode and change the driving value to 8mA. Enable VCC and VCCQ power supply for SD.
Signed-off-by: Wenbin Mei wenbin.mei@mediatek.com Change-Id: I11151c659b251db987f797a6ae4a08a07971144b --- M src/mainboard/google/asurada/mainboard.c 1 file changed, 23 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/47008/2
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47008 )
Change subject: mb/google/asurada: Configure pins mode for SD ......................................................................
Patch Set 2:
(3 comments)
https://review.coreboot.org/c/coreboot/+/47008/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/47008/1//COMMIT_MSG@11 PS1, Line 11: Enable VCC and VCCQ power supply for SD.
Either start a new paragraph (by adding a blank line before this), or merge into the previous line.
Ack
https://review.coreboot.org/c/coreboot/+/47008/1/src/mainboard/google/asurad... File src/mainboard/google/asurada/mainboard.c:
https://review.coreboot.org/c/coreboot/+/47008/1/src/mainboard/google/asurad... PS1, Line 11: #include <soc/regulator.h>
Please sort these.
Ack
https://review.coreboot.org/c/coreboot/+/47008/1/src/mainboard/google/asurad... PS1, Line 101: if (!mainboard_regulator_is_enabled(MTK_REGULATOR_VCC)) : mainboard_enable_requlator(MTK_REGULATOR_VCC, enable); : if (!mainboard_regulator_is_enabled(MTK_REGULATOR_VCCQ)) : mainboard_enable_requlator(MTK_REGULATOR_VCCQ, enable);
will there be problems if we just call mainboard_enable_regulator without checking if it's already e […]
Done. CB:46687
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47008 )
Change subject: mb/google/asurada: Configure pins mode for SD ......................................................................
Patch Set 2: Code-Review+2
Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47008 )
Change subject: mb/google/asurada: Configure pins mode for SD ......................................................................
mb/google/asurada: Configure pins mode for SD
Configure the pins for SD to msdc1 mode and change the driving value to 8mA. Enable VCC and VCCQ power supply for SD.
Signed-off-by: Wenbin Mei wenbin.mei@mediatek.com Change-Id: I11151c659b251db987f797a6ae4a08a07971144b Reviewed-on: https://review.coreboot.org/c/coreboot/+/47008 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Yu-Ping Wu yupingso@google.com --- M src/mainboard/google/asurada/mainboard.c 1 file changed, 23 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved
diff --git a/src/mainboard/google/asurada/mainboard.c b/src/mainboard/google/asurada/mainboard.c index 8699ede..e00eb2f 100644 --- a/src/mainboard/google/asurada/mainboard.c +++ b/src/mainboard/google/asurada/mainboard.c @@ -5,6 +5,7 @@ #include <device/device.h> #include <device/mmio.h> #include <soc/gpio.h> +#include <soc/regulator.h> #include <soc/usb.h>
#include "gpio.h" @@ -14,7 +15,15 @@ #define MSDC0_DRV_MASK 0x3fffffff #define MSDC1_DRV_MASK 0x3ffff000 #define MSDC0_DRV_VALUE 0x24924924 -#define MSDC1_DRV_VALUE 0x24924000 +#define MSDC1_DRV_VALUE 0x1b6db000 + +#define MSDC1_GPIO_MODE0_BASE 0x10005360 +#define MSDC1_GPIO_MODE0_MASK 0x77777000 +#define MSDC1_GPIO_MODE0_VALUE 0x11111000 + +#define MSDC1_GPIO_MODE1_BASE 0x10005370 +#define MSDC1_GPIO_MODE1_MASK 0x7 +#define MSDC1_GPIO_MODE1_VALUE 0x1
static void register_reset_to_bl31(void) { @@ -57,6 +66,9 @@ static void configure_sdcard(void) { void *gpio_base = (void *)IOCFG_RM_BASE; + void *gpio_mode0_base = (void *)MSDC1_GPIO_MODE0_BASE; + void *gpio_mode1_base = (void *)MSDC1_GPIO_MODE1_BASE; + uint8_t enable = 1; int i;
const gpio_t sdcard_pu_pin[] = { @@ -75,8 +87,17 @@ for (i = 0; i < ARRAY_SIZE(sdcard_pd_pin); i++) gpio_set_pull(sdcard_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN);
- /* set sdcard cmd/dat/clk pins driving to 10mA */ + /* set sdcard cmd/dat/clk pins driving to 8mA */ clrsetbits32(gpio_base, MSDC1_DRV_MASK, MSDC1_DRV_VALUE); + + /* set sdcard dat2/dat0/dat3/cmd/clk pins to msdc1 mode */ + clrsetbits32(gpio_mode0_base, MSDC1_GPIO_MODE0_MASK, MSDC1_GPIO_MODE0_VALUE); + + /* set sdcard dat1 pin to msdc1 mode */ + clrsetbits32(gpio_mode1_base, MSDC1_GPIO_MODE1_MASK, MSDC1_GPIO_MODE1_VALUE); + + mainboard_enable_regulator(MTK_REGULATOR_VCC, enable); + mainboard_enable_regulator(MTK_REGULATOR_VCCQ, enable); }
static void mainboard_init(struct device *dev)
-
Hung-Te Lin (Code Review) -
Wenbin Mei (Code Review)
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Yidi Lin (Code Review)
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Yu-Ping Wu (Code Review)