Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38796 )
Change subject: soc/intel/{skl, common}: Move ME Firmware SKU Types to common code ......................................................................
soc/intel/{skl, common}: Move ME Firmware SKU Types to common code
Below changes are done in the patch: 1. Move ME firmware SKU types into common code. 2. Define ME_HFS3_FW_SKU_CUSTOM SKU.
TEST=Verified on hatch & soraka.
Change-Id: Iaa4cf8d5b41c1008da1e7aa63b5a6960bb9a727b Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/include/intelblocks/cse.h M src/soc/intel/skylake/include/soc/me.h 2 files changed, 5 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/38796/1
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index aff330a..6f8f4ff 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -41,6 +41,11 @@ #define ME_HFS1_COM_SOFT_TEMP_DISABLE 0x3 #define ME_HFS1_COM_SECOVER_MEI_MSG 0x5
+/* ME Firmware SKU Types */ +#define ME_HFS3_FW_SKU_CONSUMER 0x2 +#define ME_HFS3_FW_SKU_CORPORATE 0x3 +#define ME_HFS3_FW_SKU_CUSTOM 0x5 + /* HFSTS register offsets in PCI config space */ enum { PCI_ME_HFSTS1 = 0x40, diff --git a/src/soc/intel/skylake/include/soc/me.h b/src/soc/intel/skylake/include/soc/me.h index 30de219..e8de30d 100644 --- a/src/soc/intel/skylake/include/soc/me.h +++ b/src/soc/intel/skylake/include/soc/me.h @@ -168,9 +168,6 @@ } __packed fields; };
-#define ME_HFS3_FW_SKU_CONSUMER 0x2 -#define ME_HFS3_FW_SKU_CORPORATE 0x3 - union me_hfs3 { u32 data; struct {
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38796 )
Change subject: soc/intel/{skl, common}: Move ME Firmware SKU Types to common code ......................................................................
Patch Set 1: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38796 )
Change subject: soc/intel/{skl, common}: Move ME Firmware SKU Types to common code ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38796/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38796/1//COMMIT_MSG@9 PS1, Line 9: Below changes are done in the patch: The sentence is not needed.
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Paul Menzel, Rizwan Qureshi, build bot (Jenkins), Nico Huber, Furquan Shaikh, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38796
to look at the new patch set (#2).
Change subject: soc/intel/{skl, common}: Move ME Firmware SKU Types to common code ......................................................................
soc/intel/{skl, common}: Move ME Firmware SKU Types to common code
1. Move ME firmware SKU types into common code. 2. Define ME_HFS3_FW_SKU_CUSTOM SKU.
TEST=Verified on hatch & soraka.
Change-Id: Iaa4cf8d5b41c1008da1e7aa63b5a6960bb9a727b Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/include/intelblocks/cse.h M src/soc/intel/skylake/include/soc/me.h 2 files changed, 5 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/38796/2
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38796 )
Change subject: soc/intel/{skl, common}: Move ME Firmware SKU Types to common code ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38796/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38796/1//COMMIT_MSG@9 PS1, Line 9: Below changes are done in the patch:
The sentence is not needed.
Done
Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Paul Menzel, Rizwan Qureshi, build bot (Jenkins), Nico Huber, Furquan Shaikh, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38796
to look at the new patch set (#3).
Change subject: soc/intel/{skl, common}: Move ME Firmware SKU Types to common code ......................................................................
soc/intel/{skl, common}: Move ME Firmware SKU Types to common code
1. Move ME firmware SKU types into common code. 2. Define ME_HFS3_FW_SKU_CUSTOM SKU.
TEST=Verified on hatch & soraka.
Change-Id: Iaa4cf8d5b41c1008da1e7aa63b5a6960bb9a727b Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/include/intelblocks/cse.h M src/soc/intel/skylake/include/soc/me.h 2 files changed, 5 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/38796/3
Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38796 )
Change subject: soc/intel/{skl, common}: Move ME Firmware SKU Types to common code ......................................................................
soc/intel/{skl, common}: Move ME Firmware SKU Types to common code
1. Move ME firmware SKU types into common code. 2. Define ME_HFS3_FW_SKU_CUSTOM SKU.
TEST=Verified on hatch & soraka.
Change-Id: Iaa4cf8d5b41c1008da1e7aa63b5a6960bb9a727b Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38796 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/common/block/include/intelblocks/cse.h M src/soc/intel/skylake/include/soc/me.h 2 files changed, 5 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index aff330a..6f8f4ff 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -41,6 +41,11 @@ #define ME_HFS1_COM_SOFT_TEMP_DISABLE 0x3 #define ME_HFS1_COM_SECOVER_MEI_MSG 0x5
+/* ME Firmware SKU Types */ +#define ME_HFS3_FW_SKU_CONSUMER 0x2 +#define ME_HFS3_FW_SKU_CORPORATE 0x3 +#define ME_HFS3_FW_SKU_CUSTOM 0x5 + /* HFSTS register offsets in PCI config space */ enum { PCI_ME_HFSTS1 = 0x40, diff --git a/src/soc/intel/skylake/include/soc/me.h b/src/soc/intel/skylake/include/soc/me.h index 30de219..e8de30d 100644 --- a/src/soc/intel/skylake/include/soc/me.h +++ b/src/soc/intel/skylake/include/soc/me.h @@ -168,9 +168,6 @@ } __packed fields; };
-#define ME_HFS3_FW_SKU_CONSUMER 0x2 -#define ME_HFS3_FW_SKU_CORPORATE 0x3 - union me_hfs3 { u32 data; struct {
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38796 )
Change subject: soc/intel/{skl, common}: Move ME Firmware SKU Types to common code ......................................................................
Patch Set 4:
Automatic boot test returned (PASS/FAIL/TOTAL): 3/0/3 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : https://lava.9esec.io/r/550 EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/549 EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/548
Please note: This test is under development and might not be accurate at all!