Change in coreboot[master]: mb/google/puff: Update DPTF parameters and TDP PL1/PL2 values
David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters and TDP PL1/PL2 values ......................................................................
mb/google/puff: Update DPTF parameters and TDP PL1/PL2 values
Update DPTF parameters and TDP PL1/PL2 override to 15W/51W for kaisa and duffy
BUG=b:166696500 TEST=build and verify by thermal team
Change-Id: I53a4e8809369883c3ba77744fdc05fb510408209 Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com --- M src/mainboard/google/hatch/variants/duffy/include/variant/acpi/dptf.asl M src/mainboard/google/hatch/variants/duffy/overridetree.cb M src/mainboard/google/hatch/variants/kaisa/include/variant/acpi/dptf.asl M src/mainboard/google/hatch/variants/kaisa/overridetree.cb 4 files changed, 194 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/44903/1
diff --git a/src/mainboard/google/hatch/variants/duffy/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/duffy/include/variant/acpi/dptf.asl index 6694063..f33dd60 100644 --- a/src/mainboard/google/hatch/variants/duffy/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/hatch/variants/duffy/include/variant/acpi/dptf.asl @@ -1,3 +1,94 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <puff/acpi/dptf.asl> +#define DPTF_CPU_PASSIVE 95 +#define DPTF_CPU_CRITICAL 100 +#define DPTF_CPU_ACTIVE_AC0 94 + +#define DPTF_TSR0_SENSOR_ID 0 +#define DPTF_TSR0_SENSOR_NAME "Thermal Sensor 1" +#define DPTF_TSR0_PASSIVE 68 +#define DPTF_TSR0_CRITICAL 78 +#define DPTF_TSR0_ACTIVE_AC0 65 +#define DPTF_TSR0_ACTIVE_AC1 61 +#define DPTF_TSR0_ACTIVE_AC2 57 +#define DPTF_TSR0_ACTIVE_AC3 53 +#define DPTF_TSR0_ACTIVE_AC4 49 +#define DPTF_TSR0_ACTIVE_AC5 45 +#define DPTF_TSR0_ACTIVE_AC6 41 + +#define DPTF_ENABLE_CHARGER +#define DPTF_ENABLE_FAN_CONTROL + +/* Charger performance states, board-specific values from charger and EC */ +Name (CHPS, Package () { + Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 }, /* 1.7A (MAX) */ + Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */ + Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */ + Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */ +}) + +/* DFPS: Fan Performance States */ +Name (DFPS, Package () { + 0, // Revision + /* + * TODO : Need to update this Table after characterization. + * These are initial reference values. + */ + /* Control, Trip Point, Speed, NoiseLevel, Power */ + Package () {90, 0xFFFFFFFF, 6700, 220, 2200}, + Package () {80, 0xFFFFFFFF, 5800, 180, 1800}, + Package () {70, 0xFFFFFFFF, 5000, 145, 1450}, + Package () {60, 0xFFFFFFFF, 4900, 115, 1150}, + Package () {50, 0xFFFFFFFF, 3838, 90, 900}, + Package () {40, 0xFFFFFFFF, 2904, 55, 550}, + Package () {30, 0xFFFFFFFF, 2337, 30, 300}, + Package () {20, 0xFFFFFFFF, 1608, 15, 150}, + Package () {10, 0xFFFFFFFF, 800, 10, 100}, + Package () {0, 0xFFFFFFFF, 0, 0, 50} +}) + +Name (DART, Package () { + /* Fan effect on CPU */ + 0, // Revision + Package () { + /* + * Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6, + * AC7, AC8, AC9 + */ + _SB.DPTF.TFN1, _SB.PCI0.TCPU, 100, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0 + }, + Package () { + _SB.DPTF.TFN1, _SB.DPTF.TSR0, 100, 90, 80, 70, 60, 50, 40, 0, + 0, 0, 0 + } +}) + +Name (DTRT, Package () { + /* CPU Throttle Effect on CPU */ + Package () { _SB.PCI0.TCPU, _SB.PCI0.TCPU, 100, 50, 0, 0, 0, 0 }, + + /* CPU Throttle Effect on Ambient (TSR0) */ + Package () { _SB.PCI0.TCPU, _SB.DPTF.TSR0, 100, 50, 0, 0, 0, 0 }, +}) + +Name (MPPC, Package () +{ + 0x2, /* Revision */ + Package () { /* Power Limit 1 */ + 0, /* PowerLimitIndex, 0 for Power Limit 1 */ + 15000, /* PowerLimitMinimum */ + 15000, /* PowerLimitMaximum */ + 28000, /* TimeWindowMinimum */ + 32000, /* TimeWindowMaximum */ + 200 /* StepSize */ + }, + Package () { /* Power Limit 2 */ + 1, /* PowerLimitIndex, 1 for Power Limit 2 */ + 15000, /* PowerLimitMinimum */ + 51000, /* PowerLimitMaximum */ + 28000, /* TimeWindowMinimum */ + 32000, /* TimeWindowMaximum */ + 1000 /* StepSize */ + } +}) diff --git a/src/mainboard/google/hatch/variants/duffy/overridetree.cb b/src/mainboard/google/hatch/variants/duffy/overridetree.cb index a4fa09d..5ee3c59 100644 --- a/src/mainboard/google/hatch/variants/duffy/overridetree.cb +++ b/src/mainboard/google/hatch/variants/duffy/overridetree.cb @@ -1,6 +1,11 @@ chip soc/intel/cannonlake register "tcc_offset" = "5" # TCC of 95C
+ register "power_limits_config" = "{ + .tdp_pl1_override = 15, + .tdp_pl2_override = 51, + }" + # Auto-switch between X4 NVMe and X2 NVMe. register "TetonGlacierMode" = "1"
diff --git a/src/mainboard/google/hatch/variants/kaisa/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/kaisa/include/variant/acpi/dptf.asl index 6694063..f33dd60 100644 --- a/src/mainboard/google/hatch/variants/kaisa/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/hatch/variants/kaisa/include/variant/acpi/dptf.asl @@ -1,3 +1,94 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <puff/acpi/dptf.asl> +#define DPTF_CPU_PASSIVE 95 +#define DPTF_CPU_CRITICAL 100 +#define DPTF_CPU_ACTIVE_AC0 94 + +#define DPTF_TSR0_SENSOR_ID 0 +#define DPTF_TSR0_SENSOR_NAME "Thermal Sensor 1" +#define DPTF_TSR0_PASSIVE 68 +#define DPTF_TSR0_CRITICAL 78 +#define DPTF_TSR0_ACTIVE_AC0 65 +#define DPTF_TSR0_ACTIVE_AC1 61 +#define DPTF_TSR0_ACTIVE_AC2 57 +#define DPTF_TSR0_ACTIVE_AC3 53 +#define DPTF_TSR0_ACTIVE_AC4 49 +#define DPTF_TSR0_ACTIVE_AC5 45 +#define DPTF_TSR0_ACTIVE_AC6 41 + +#define DPTF_ENABLE_CHARGER +#define DPTF_ENABLE_FAN_CONTROL + +/* Charger performance states, board-specific values from charger and EC */ +Name (CHPS, Package () { + Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 }, /* 1.7A (MAX) */ + Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */ + Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */ + Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */ +}) + +/* DFPS: Fan Performance States */ +Name (DFPS, Package () { + 0, // Revision + /* + * TODO : Need to update this Table after characterization. + * These are initial reference values. + */ + /* Control, Trip Point, Speed, NoiseLevel, Power */ + Package () {90, 0xFFFFFFFF, 6700, 220, 2200}, + Package () {80, 0xFFFFFFFF, 5800, 180, 1800}, + Package () {70, 0xFFFFFFFF, 5000, 145, 1450}, + Package () {60, 0xFFFFFFFF, 4900, 115, 1150}, + Package () {50, 0xFFFFFFFF, 3838, 90, 900}, + Package () {40, 0xFFFFFFFF, 2904, 55, 550}, + Package () {30, 0xFFFFFFFF, 2337, 30, 300}, + Package () {20, 0xFFFFFFFF, 1608, 15, 150}, + Package () {10, 0xFFFFFFFF, 800, 10, 100}, + Package () {0, 0xFFFFFFFF, 0, 0, 50} +}) + +Name (DART, Package () { + /* Fan effect on CPU */ + 0, // Revision + Package () { + /* + * Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6, + * AC7, AC8, AC9 + */ + _SB.DPTF.TFN1, _SB.PCI0.TCPU, 100, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0 + }, + Package () { + _SB.DPTF.TFN1, _SB.DPTF.TSR0, 100, 90, 80, 70, 60, 50, 40, 0, + 0, 0, 0 + } +}) + +Name (DTRT, Package () { + /* CPU Throttle Effect on CPU */ + Package () { _SB.PCI0.TCPU, _SB.PCI0.TCPU, 100, 50, 0, 0, 0, 0 }, + + /* CPU Throttle Effect on Ambient (TSR0) */ + Package () { _SB.PCI0.TCPU, _SB.DPTF.TSR0, 100, 50, 0, 0, 0, 0 }, +}) + +Name (MPPC, Package () +{ + 0x2, /* Revision */ + Package () { /* Power Limit 1 */ + 0, /* PowerLimitIndex, 0 for Power Limit 1 */ + 15000, /* PowerLimitMinimum */ + 15000, /* PowerLimitMaximum */ + 28000, /* TimeWindowMinimum */ + 32000, /* TimeWindowMaximum */ + 200 /* StepSize */ + }, + Package () { /* Power Limit 2 */ + 1, /* PowerLimitIndex, 1 for Power Limit 2 */ + 15000, /* PowerLimitMinimum */ + 51000, /* PowerLimitMaximum */ + 28000, /* TimeWindowMinimum */ + 32000, /* TimeWindowMaximum */ + 1000 /* StepSize */ + } +}) diff --git a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb index c6aef05..94edb0a 100644 --- a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb @@ -1,6 +1,11 @@ chip soc/intel/cannonlake register "tcc_offset" = "5" # TCC of 95C
+ register "power_limits_config" = "{ + .tdp_pl1_override = 15, + .tdp_pl2_override = 51, + }" + # Auto-switch between X4 NVMe and X2 NVMe. register "TetonGlacierMode" = "1"
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters and TDP PL1/PL2 values ......................................................................
Patch Set 1:
Hi David, thanks for the patch. Please see the following series:
https://review.coreboot.org/c/coreboot/+/44905/
we should align around using devicetree instead of hardcoded ASL moving forwards.
Hello build bot (Jenkins), Edward O'Callaghan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44903
to look at the new patch set (#2).
Change subject: mb/google/puff: Update DPTF parameters and TDP PL1/PL2 values ......................................................................
mb/google/puff: Update DPTF parameters and TDP PL1/PL2 values
Update DPTF parameters and TDP PL1/PL2 override to 15W/51W for kaisa and duffy
BUG=b:166696500 BRANCH=puff TEST=build and verify by thermal team
Change-Id: I53a4e8809369883c3ba77744fdc05fb510408209 Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com --- M src/mainboard/google/hatch/variants/duffy/overridetree.cb M src/mainboard/google/hatch/variants/kaisa/overridetree.cb 2 files changed, 36 insertions(+), 30 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/44903/2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters and TDP PL1/PL2 values ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44903/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44903/2//COMMIT_MSG@10 PS2, Line 10: and duffy 1. What are the values before the change? 2. Where did you get the new values from?
Hello build bot (Jenkins), Edward O'Callaghan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44903
to look at the new patch set (#3).
Change subject: mb/google/puff: Update DPTF parameters and TDP PL1/PL2 values ......................................................................
mb/google/puff: Update DPTF parameters and TDP PL1/PL2 values
Update DPTF parameters and TDP PL1/PL2 override to 15W/51W for kaisa and duffy
BUG=b:166696500 BRANCH=puff TEST=build and verify by thermal team
Change-Id: I53a4e8809369883c3ba77744fdc05fb510408209 Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com --- M src/mainboard/google/hatch/variants/duffy/overridetree.cb M src/mainboard/google/hatch/variants/kaisa/overridetree.cb 2 files changed, 36 insertions(+), 30 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/44903/3
Hello build bot (Jenkins), Edward O'Callaghan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44903
to look at the new patch set (#4).
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
mb/google/puff: Update DPTF parameters for kaisa and duffy
1. Apply the DPTF parameters receive from the thermal team. 2. Change PL1 min value from 3W to 15W. 3. Change PL2 max value from 60W to 51W.
BUG=b:166696500 BRANCH=puff TEST=build and verify by thermal team
Change-Id: I53a4e8809369883c3ba77744fdc05fb510408209 Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com --- M src/mainboard/google/hatch/variants/duffy/overridetree.cb M src/mainboard/google/hatch/variants/kaisa/overridetree.cb 2 files changed, 36 insertions(+), 30 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/44903/4
David Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
Patch Set 4:
(1 comment)
Thanks.
https://review.coreboot.org/c/coreboot/+/44903/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44903/2//COMMIT_MSG@10 PS2, Line 10: and duffy
- What are the values before the change? […]
Done
Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44903/4/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/duffy/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44903/4/src/mainboard/google/hatch/... PS4, Line 291: CHARGER CPU
https://review.coreboot.org/c/coreboot/+/44903/4/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/kaisa/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44903/4/src/mainboard/google/hatch/... PS4, Line 291: CHARGER CPU
Hello Sam McNally, build bot (Jenkins), Edward O'Callaghan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44903
to look at the new patch set (#5).
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
mb/google/puff: Update DPTF parameters for kaisa and duffy
1. Apply the DPTF parameters receive from the thermal team. 2. Change PL1 min value from 3W to 15W. 3. Change PL2 max value from 60W to 51W.
BUG=b:166696500 BRANCH=puff TEST=build and verify by thermal team
Change-Id: I53a4e8809369883c3ba77744fdc05fb510408209 Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com --- M src/mainboard/google/hatch/variants/duffy/overridetree.cb M src/mainboard/google/hatch/variants/kaisa/overridetree.cb 2 files changed, 36 insertions(+), 30 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/44903/5
David Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
Patch Set 5:
(2 comments)
Thanks.
https://review.coreboot.org/c/coreboot/+/44903/4/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/duffy/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44903/4/src/mainboard/google/hatch/... PS4, Line 291: CHARGER
CPU
Done
https://review.coreboot.org/c/coreboot/+/44903/4/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/kaisa/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44903/4/src/mainboard/google/hatch/... PS4, Line 291: CHARGER
CPU
Done
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
Patch Set 5: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/44903/5/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/duffy/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44903/5/src/mainboard/google/hatch/... PS5, Line 279: sorry David, do you mind rebasing again please?
Hello Sam McNally, build bot (Jenkins), Edward O'Callaghan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44903
to look at the new patch set (#6).
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
mb/google/puff: Update DPTF parameters for kaisa and duffy
1. Apply the DPTF parameters receive from the thermal team. 2. Change PL2 min value from 25W to 15W. 3. Change PL2 max value from 64W to 51W.
BUG=b:166696500 BRANCH=puff TEST=build and verify by thermal team
Change-Id: I53a4e8809369883c3ba77744fdc05fb510408209 Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com --- M src/mainboard/google/hatch/variants/duffy/overridetree.cb M src/mainboard/google/hatch/variants/kaisa/overridetree.cb 2 files changed, 36 insertions(+), 30 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/44903/6
Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
Patch Set 6: Code-Review+2
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
Patch Set 6: Code-Review+1
(3 comments)
https://review.coreboot.org/c/coreboot/+/44903/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44903/6//COMMIT_MSG@15 PS6, Line 15: TEST=build and verify by thermal team Has this been re-validated now?
https://review.coreboot.org/c/coreboot/+/44903/6/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/duffy/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44903/6/src/mainboard/google/hatch/... PS6, Line 299: 25-64W 15-51W
https://review.coreboot.org/c/coreboot/+/44903/6/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/kaisa/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44903/6/src/mainboard/google/hatch/... PS6, Line 299: 25-64W 15-51W
Hello Sam McNally, build bot (Jenkins), Edward O'Callaghan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44903
to look at the new patch set (#7).
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
mb/google/puff: Update DPTF parameters for kaisa and duffy
1. Apply the DPTF parameters receive from the thermal team. 2. Change PL2 min value from 25W to 15W. 3. Change PL2 max value from 64W to 51W.
BUG=b:166696500 BRANCH=puff TEST=build and verify by thermal team
Change-Id: I53a4e8809369883c3ba77744fdc05fb510408209 Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com --- M src/mainboard/google/hatch/variants/duffy/overridetree.cb M src/mainboard/google/hatch/variants/kaisa/overridetree.cb 2 files changed, 38 insertions(+), 32 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/44903/7
David Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
Patch Set 7:
(4 comments)
Thanks
https://review.coreboot.org/c/coreboot/+/44903/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44903/6//COMMIT_MSG@15 PS6, Line 15: TEST=build and verify by thermal team
Has this been re-validated now?
Yes, has verified by thermal team
https://review.coreboot.org/c/coreboot/+/44903/5/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/duffy/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44903/5/src/mainboard/google/hatch/... PS5, Line 279:
sorry David, do you mind rebasing again please?
Done
https://review.coreboot.org/c/coreboot/+/44903/6/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/duffy/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44903/6/src/mainboard/google/hatch/... PS6, Line 299: 25-64W
15-51W
Done
https://review.coreboot.org/c/coreboot/+/44903/6/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/kaisa/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44903/6/src/mainboard/google/hatch/... PS6, Line 299: 25-64W
15-51W
Done
Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
Patch Set 7: Code-Review+2
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
Patch Set 7: Code-Review+2
Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
Patch Set 7: Code-Review+2
Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44903 )
Change subject: mb/google/puff: Update DPTF parameters for kaisa and duffy ......................................................................
mb/google/puff: Update DPTF parameters for kaisa and duffy
1. Apply the DPTF parameters receive from the thermal team. 2. Change PL2 min value from 25W to 15W. 3. Change PL2 max value from 64W to 51W.
BUG=b:166696500 BRANCH=puff TEST=build and verify by thermal team
Change-Id: I53a4e8809369883c3ba77744fdc05fb510408209 Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44903 Reviewed-by: Sam McNally sammc@google.com Reviewed-by: Edward O'Callaghan quasisec@chromium.org Reviewed-by: Stefan Reinauer stefan.reinauer@coreboot.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/hatch/variants/duffy/overridetree.cb M src/mainboard/google/hatch/variants/kaisa/overridetree.cb 2 files changed, 38 insertions(+), 32 deletions(-)
Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved Sam McNally: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/duffy/overridetree.cb b/src/mainboard/google/hatch/variants/duffy/overridetree.cb index 72f9516..6bb1d94 100644 --- a/src/mainboard/google/hatch/variants/duffy/overridetree.cb +++ b/src/mainboard/google/hatch/variants/duffy/overridetree.cb @@ -1,6 +1,11 @@ chip soc/intel/cannonlake register "tcc_offset" = "5" # TCC of 95C
+ register "power_limits_config" = "{ + .tdp_pl1_override = 15, + .tdp_pl2_override = 51, + }" + # Auto-switch between X4 NVMe and X2 NVMe. register "TetonGlacierMode" = "1"
@@ -271,29 +276,27 @@ chip drivers/intel/dptf ## Active Policy register "policies.active[0]" = "{.target=DPTF_CPU, - .thresholds={TEMP_PCT(90, 85), - TEMP_PCT(85, 75), - TEMP_PCT(80, 65), - TEMP_PCT(75, 55), - TEMP_PCT(70, 45),}}" + .thresholds={TEMP_PCT(94, 0),}}" register "policies.active[1]" = "{.target=DPTF_TEMP_SENSOR_0, - .thresholds={TEMP_PCT(50, 85), - TEMP_PCT(47, 75), - TEMP_PCT(45, 65), - TEMP_PCT(42, 55), - TEMP_PCT(39, 45),}}" + .thresholds={TEMP_PCT(65, 90), + TEMP_PCT(61, 80), + TEMP_PCT(57, 70), + TEMP_PCT(53, 60), + TEMP_PCT(49, 50), + TEMP_PCT(45, 40), + TEMP_PCT(41, 0),}}"
## Passive Policy - register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 93, 5000)" - register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 6000)" + register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 5000)" + register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 68, 5000)"
## Critical Policy register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)" - register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN)" + register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 78, SHUTDOWN)"
## Power Limits Control # PL1 is fixed at 15W, avg over 28-32s interval - # 25-64W PL2 in 1000mW increments, avg over 28-32s interval + # 15-51W PL2 in 1000mW increments, avg over 28-32s interval register "controls.power_limits.pl1" = "{ .min_power = 15000, .max_power = 15000, @@ -301,8 +304,8 @@ .time_window_max = 32 * MSECS_PER_SEC, .granularity = 200,}" register "controls.power_limits.pl2" = "{ - .min_power = 25000, - .max_power = 64000, + .min_power = 15000, + .max_power = 51000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, .granularity = 1000,}" diff --git a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb index 5fc9c08..e3dcbd5 100644 --- a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb @@ -1,6 +1,11 @@ chip soc/intel/cannonlake register "tcc_offset" = "5" # TCC of 95C
+ register "power_limits_config" = "{ + .tdp_pl1_override = 15, + .tdp_pl2_override = 51, + }" + # Auto-switch between X4 NVMe and X2 NVMe. register "TetonGlacierMode" = "1"
@@ -271,29 +276,27 @@ chip drivers/intel/dptf ## Active Policy register "policies.active[0]" = "{.target=DPTF_CPU, - .thresholds={TEMP_PCT(90, 85), - TEMP_PCT(85, 75), - TEMP_PCT(80, 65), - TEMP_PCT(75, 55), - TEMP_PCT(70, 45),}}" + .thresholds={TEMP_PCT(94, 0),}}" register "policies.active[1]" = "{.target=DPTF_TEMP_SENSOR_0, - .thresholds={TEMP_PCT(50, 85), - TEMP_PCT(47, 75), - TEMP_PCT(45, 65), - TEMP_PCT(42, 55), - TEMP_PCT(39, 45),}}" + .thresholds={TEMP_PCT(65, 90), + TEMP_PCT(61, 80), + TEMP_PCT(57, 70), + TEMP_PCT(53, 60), + TEMP_PCT(49, 50), + TEMP_PCT(45, 40), + TEMP_PCT(41, 0),}}"
## Passive Policy - register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 93, 5000)" - register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 6000)" + register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 5000)" + register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 68, 5000)"
## Critical Policy register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)" - register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN)" + register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 78, SHUTDOWN)"
## Power Limits Control # PL1 is fixed at 15W, avg over 28-32s interval - # 25-64W PL2 in 1000mW increments, avg over 28-32s interval + # 15-51W PL2 in 1000mW increments, avg over 28-32s interval register "controls.power_limits.pl1" = "{ .min_power = 15000, .max_power = 15000, @@ -301,8 +304,8 @@ .time_window_max = 32 * MSECS_PER_SEC, .granularity = 200,}" register "controls.power_limits.pl2" = "{ - .min_power = 25000, - .max_power = 64000, + .min_power = 15000, + .max_power = 51000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, .granularity = 1000,}"
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David Wu (Code Review) -
Edward O'Callaghan (Code Review)
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Paul Menzel (Code Review)
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Sam McNally (Code Review)
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Stefan Reinauer (Code Review)