Attention is currently required from: Hung-Te Lin, Paul Menzel, Wentao Qin, Xuxin Xiong, Yang Wu, Yu-Ping Wu.
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82089?usp=email )
Change subject: mb/google/corsola/var/wugtrio: Add initialize of USB port 0 ......................................................................
Patch Set 10:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82089/comment/b21cc945_357ba713 : PS10, Line 7: Add initialize of USB port 0 Initialize USB port 0
File src/soc/mediatek/common/usb.c:
https://review.coreboot.org/c/coreboot/+/82089/comment/ecd4bdfd_e65b90f6 : PS9, Line 162:
But this will not receive the parameters of SSUSB_IPPC_BASE_P0 and SSUSB_SIF_BASE_P0
You can do something like this
common/usb.c ``` void setup_usb_host_controller(void) { u3p_msg("Setting up USB HOST controller...\n");
mtk_usb_prepare(); ssusb_soft_reset(); if (u3phy_ports_enable()) { u3p_err("%s fail to enable ports\n", __func__); return; } u3phy_power_on(); mtk_usb_adjust_phy_shift(); u3p_msg("phy power-on done.\n"); }
void setup_usb_host(void) { update_usb_base_regs(SSUSB_IPPC_BASE, SSUSB_SIF_BASE); setup_usb_host_controller(); } ```
common/usb_secondary.c ``` void setup_usb_secondary_host(void) { /* We always consider USB2 port as the secondary UBS host regardless of the register naming */ update_usb_base_regs(SSUSB_IPPC_BASE_P0, SSUSB_SIF_BASE_P0); setup_usb_host_controller(); } ```
Then we can call `setup_usb_host` for the primary USB host and call `setup_usb_secondary_host` for the secondary USB host.