Change in coreboot[master]: soc/medaitek/mt8186: set pin drive strength to 8mA for NOR

[build bot (Jenkins) (Code Review)]

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62472 )

Change subject: soc/medaitek/mt8186: set pin drive strength to 8mA for NOR
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Patch Set 2: Verified+1

(2 comments)

File src/soc/mediatek/mt8186/spi.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-142791):
https://review.coreboot.org/c/coreboot/+/62472/comment/8bc021cf_7dbf6a1a 
PS2, Line 17: #define NOR_PIN_DRIVE_STRENTH GPIO_DRV3
'STRENTH' may be misspelled - perhaps 'STRENGTH'?

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-142791):
https://review.coreboot.org/c/coreboot/+/62472/comment/3e6cc710_5bc13960 
PS2, Line 155: 		if (gpio_set_driving(ptr[i].gpio, NOR_PIN_DRIVE_STRENTH) < 0)
'STRENTH' may be misspelled - perhaps 'STRENGTH'?