Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46973 )
Change subject: soc/intel/broadwell: Add ACPI CIDs for SerialIO devices ......................................................................
soc/intel/broadwell: Add ACPI CIDs for SerialIO devices
Lynxpoint has them, so add them on Broadwell as well.
Change-Id: Iaa3e8044090262a64e58062ec4b116976978ce55 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/broadwell/pch/acpi/serialio.asl 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/46973/1
diff --git a/src/soc/intel/broadwell/pch/acpi/serialio.asl b/src/soc/intel/broadwell/pch/acpi/serialio.asl index 2bacd2b..1e6dbac 100644 --- a/src/soc/intel/broadwell/pch/acpi/serialio.asl +++ b/src/soc/intel/broadwell/pch/acpi/serialio.asl @@ -166,6 +166,7 @@ // LynxPoint-LP Return ("INT33C2") } + Name (_CID, "INT33C2") Name (_UID, 1)
Name (SSCN, Package () { 432, 507, 30 }) @@ -242,6 +243,7 @@ // LynxPoint-LP Return ("INT33C3") } + Name (_CID, "INT33C3") Name (_UID, 1)
Name (SSCN, Package () { 432, 507, 30 }) @@ -318,6 +320,7 @@ // LynxPoint-LP Return ("INT33C0") } + Name (_CID, "INT33C0") Name (_UID, 1)
// BAR0 is assigned during PCI enumeration and saved into NVS @@ -379,6 +382,7 @@ // LynxPoint-LP Return ("INT33C1") } + Name (_CID, "INT33C1") Name (_UID, 1)
// BAR0 is assigned during PCI enumeration and saved into NVS @@ -452,6 +456,7 @@ // LynxPoint-LP Return ("INT33C4") } + Name (_CID, "INT33C4") Name (_UID, 1)
// BAR0 is assigned during PCI enumeration and saved into NVS @@ -525,6 +530,7 @@ // LynxPoint-LP Return ("INT33C5") } + Name (_CID, "INT33C5") Name (_UID, 1)
// BAR0 is assigned during PCI enumeration and saved into NVS
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46973
to look at the new patch set (#4).
Change subject: soc/intel/broadwell: Add ACPI CIDs for SerialIO devices ......................................................................
soc/intel/broadwell: Add ACPI CIDs for SerialIO devices
Lynxpoint has them, so add them on Broadwell as well.
Change-Id: Iaa3e8044090262a64e58062ec4b116976978ce55 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/broadwell/pch/acpi/serialio.asl 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/46973/4
Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/46973?usp=email )
Change subject: soc/intel/broadwell: Add ACPI CIDs for SerialIO devices ......................................................................
Abandoned
Angel Pons has restored this change. ( https://review.coreboot.org/c/coreboot/+/46973?usp=email )
Change subject: soc/intel/broadwell: Add ACPI CIDs for SerialIO devices ......................................................................
Restored
Attention is currently required from: Angel Pons.
Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46973?usp=email )
Change subject: soc/intel/broadwell: Add ACPI CIDs for SerialIO devices ......................................................................
Patch Set 8: Code-Review+2
Attention is currently required from: Angel Pons.
Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46973?usp=email )
Change subject: soc/intel/broadwell: Add ACPI CIDs for SerialIO devices ......................................................................
Patch Set 8: Code-Review+2
Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46973?usp=email )
Change subject: soc/intel/broadwell: Add ACPI CIDs for SerialIO devices ......................................................................
soc/intel/broadwell: Add ACPI CIDs for SerialIO devices
Lynxpoint has them, so add them on Broadwell as well.
Change-Id: Iaa3e8044090262a64e58062ec4b116976978ce55 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46973 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Benjamin Doron benjamin.doron00@gmail.com Reviewed-by: Lean Sheng Tan sheng.tan@9elements.com --- M src/soc/intel/broadwell/pch/acpi/serialio.asl 1 file changed, 6 insertions(+), 0 deletions(-)
Approvals: Lean Sheng Tan: Looks good to me, approved build bot (Jenkins): Verified Benjamin Doron: Looks good to me, approved
diff --git a/src/soc/intel/broadwell/pch/acpi/serialio.asl b/src/soc/intel/broadwell/pch/acpi/serialio.asl index 183bca6..d28fb70 100644 --- a/src/soc/intel/broadwell/pch/acpi/serialio.asl +++ b/src/soc/intel/broadwell/pch/acpi/serialio.asl @@ -166,6 +166,7 @@ // LynxPoint-LP Return ("INT33C2") } + Name (_CID, "INT33C2") Name (_UID, 1)
Name (SSCN, Package () { 432, 507, 30 }) @@ -242,6 +243,7 @@ // LynxPoint-LP Return ("INT33C3") } + Name (_CID, "INT33C3") Name (_UID, 1)
Name (SSCN, Package () { 432, 507, 30 }) @@ -318,6 +320,7 @@ // LynxPoint-LP Return ("INT33C0") } + Name (_CID, "INT33C0") Name (_UID, 1)
// BAR0 is assigned during PCI enumeration and saved into NVS @@ -379,6 +382,7 @@ // LynxPoint-LP Return ("INT33C1") } + Name (_CID, "INT33C1") Name (_UID, 1)
// BAR0 is assigned during PCI enumeration and saved into NVS @@ -452,6 +456,7 @@ // LynxPoint-LP Return ("INT33C4") } + Name (_CID, "INT33C4") Name (_UID, 1)
// BAR0 is assigned during PCI enumeration and saved into NVS @@ -525,6 +530,7 @@ // LynxPoint-LP Return ("INT33C5") } + Name (_CID, "INT33C5") Name (_UID, 1)
// BAR0 is assigned during PCI enumeration and saved into NVS
-
Angel Pons (Code Review) -
Benjamin Doron (Code Review)
-
Lean Sheng Tan (Code Review)
-
Stefan Reinauer (Code Review)