HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37799 )
Change subject: src: Get rid of ROMCC_BOOTBLOCK ......................................................................
src: Get rid of ROMCC_BOOTBLOCK
Change-Id: I532f2dfc02b4f2a8ef4f4ed1636506da0f86886a Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/Kconfig M src/drivers/amd/agesa/Makefile.inc M src/drivers/amd/agesa/romstage.c M src/northbridge/amd/agesa/family14/state_machine.c M src/southbridge/amd/agesa/hudson/Makefile.inc M src/southbridge/amd/agesa/hudson/bootblock.c M src/southbridge/amd/cimx/sb800/Makefile.inc M src/southbridge/amd/cimx/sb800/bootblock.c M src/southbridge/amd/pi/hudson/Makefile.inc M src/southbridge/amd/pi/hudson/bootblock.c 10 files changed, 9 insertions(+), 57 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/37799/1
diff --git a/src/Kconfig b/src/Kconfig index 25bb450..c496930 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -1172,9 +1172,6 @@ # src/lib/bootblock.c#main() C entry point. bool
-config ROMCC_BOOTBLOCK - bool - ############################################################################### # Set default values for symbols created before mainboards. This allows the # option to be displayed in the general menu, but the default to be loaded in diff --git a/src/drivers/amd/agesa/Makefile.inc b/src/drivers/amd/agesa/Makefile.inc index 3c3c4fc..4536fc9 100644 --- a/src/drivers/amd/agesa/Makefile.inc +++ b/src/drivers/amd/agesa/Makefile.inc @@ -19,12 +19,8 @@
ramstage-y += state_machine.c
-ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y) bootblock-y += bootblock.c bootblock-y += cache_as_ram.S -else -cpu_incs-y += $(src)/drivers/amd/agesa/cache_as_ram.S -endif
postcar-y += exit_car.S
diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c index ee4d45e..7ad894d 100644 --- a/src/drivers/amd/agesa/romstage.c +++ b/src/drivers/amd/agesa/romstage.c @@ -50,16 +50,10 @@ u8 initial_apic_id = (u8) (cpuid_ebx(1) >> 24); int cbmem_initted = 0;
- /* Enable PCI MMIO configuration. */ - if (CONFIG(ROMCC_BOOTBLOCK)) - amd_initmmio(); - fill_sysinfo(cb);
if (initial_apic_id == 0) {
- if (CONFIG(ROMCC_BOOTBLOCK)) - timestamp_init(timestamp_get()); timestamp_add_now(TS_START_ROMSTAGE);
board_BeforeAgesa(cb); @@ -70,8 +64,7 @@ printk(BIOS_DEBUG, "APIC %02d: CPU Family_Model = %08x\n", initial_apic_id, cpuid_eax(1));
- if (!CONFIG(ROMCC_BOOTBLOCK)) - set_ap_entry_ptr(ap_romstage_main); + set_ap_entry_ptr(ap_romstage_main);
agesa_execute_state(cb, AMD_INIT_RESET);
@@ -112,10 +105,6 @@ struct sysinfo romstage_state; struct sysinfo *cb = &romstage_state;
- /* Enable PCI MMIO configuration. */ - if (CONFIG(ROMCC_BOOTBLOCK)) - amd_initmmio(); - fill_sysinfo(cb);
agesa_execute_state(cb, AMD_INIT_RESET); @@ -126,22 +115,7 @@ halt(); }
-#if CONFIG(ROMCC_BOOTBLOCK) -/* This wrapper enables easy transition away from ROMCC_BOOTBLOCK - * keeping changes in cache_as_ram.S easy to manage. - */ -asmlinkage void bootblock_c_entry(uint64_t base_timestamp) -{ - romstage_main(); -} - -asmlinkage void ap_bootblock_c_entry(void) -{ - ap_romstage_main(); -} -#else asmlinkage void car_stage_entry(void) { romstage_main(); } -#endif diff --git a/src/northbridge/amd/agesa/family14/state_machine.c b/src/northbridge/amd/agesa/family14/state_machine.c index 91a8f70..ab96b75 100644 --- a/src/northbridge/amd/agesa/family14/state_machine.c +++ b/src/northbridge/amd/agesa/family14/state_machine.c @@ -32,8 +32,7 @@ if (!boot_cpu()) return;
- if (!CONFIG(ROMCC_BOOTBLOCK)) - sb_Poweron_Init(); + sb_Poweron_Init();
/* Reboots with outb(3,0x92), outb(4,0xcf9) or triple-fault all * would fail later in AmdInitPost(), when DRAM is already configured diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index be4ea26..b8eb5b9 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -16,11 +16,9 @@
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
-ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y) bootblock-y += bootblock.c bootblock-y += early_setup.c bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c -endif
romstage-y += enable_usbdebug.c ramstage-y += enable_usbdebug.c diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c index 4da030b..508fc76 100644 --- a/src/southbridge/amd/agesa/hudson/bootblock.c +++ b/src/southbridge/amd/agesa/hudson/bootblock.c @@ -15,6 +15,9 @@
#include <stdint.h> #include <device/pci_ops.h> +#include <bootblock_common.h> +#include <amdblocks/acpimmio.h> +#include <southbridge/amd/agesa/hudson/hudson.h>
/* * Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF. @@ -61,13 +64,6 @@ hudson_enable_rom(); }
- -#if !CONFIG(ROMCC_BOOTBLOCK) - -#include <bootblock_common.h> -#include <amdblocks/acpimmio.h> -#include <southbridge/amd/agesa/hudson/hudson.h> - void bootblock_soc_early_init(void) { pci_devfn_t dev; @@ -109,4 +105,3 @@ */ pm_write8(0xd2, 0); } -#endif diff --git a/src/southbridge/amd/cimx/sb800/Makefile.inc b/src/southbridge/amd/cimx/sb800/Makefile.inc index 5a68d07..2c51648 100644 --- a/src/southbridge/amd/cimx/sb800/Makefile.inc +++ b/src/southbridge/amd/cimx/sb800/Makefile.inc @@ -16,9 +16,7 @@
# SB800 Platform Files
-ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y) bootblock-y += bootblock.c -endif
romstage-y += cfg.c romstage-y += early.c diff --git a/src/southbridge/amd/cimx/sb800/bootblock.c b/src/southbridge/amd/cimx/sb800/bootblock.c index b4f03da..4f44463 100644 --- a/src/southbridge/amd/cimx/sb800/bootblock.c +++ b/src/southbridge/amd/cimx/sb800/bootblock.c @@ -14,6 +14,7 @@ */
#include <arch/io.h> +#include <bootblock_common.h> #include <device/pci_ops.h>
static void enable_rom(void) @@ -121,11 +122,7 @@ enable_clocks(); }
-#if !CONFIG(ROMCC_BOOTBLOCK) -#include <bootblock_common.h> - void bootblock_soc_early_init(void) { bootblock_southbridge_init(); } -#endif diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc index 4aa9bab..9d985e6d 100644 --- a/src/southbridge/amd/pi/hudson/Makefile.inc +++ b/src/southbridge/amd/pi/hudson/Makefile.inc @@ -28,11 +28,9 @@ # #*****************************************************************************
-ifneq ($(CONFIG_ROMCC_BOOTBLOCK),y) bootblock-y += bootblock.c bootblock-y += early_setup.c bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c -endif
romstage-y += early_setup.c romstage-y += enable_usbdebug.c diff --git a/src/southbridge/amd/pi/hudson/bootblock.c b/src/southbridge/amd/pi/hudson/bootblock.c index d16aecc..c8e0bba 100644 --- a/src/southbridge/amd/pi/hudson/bootblock.c +++ b/src/southbridge/amd/pi/hudson/bootblock.c @@ -14,7 +14,10 @@ */
#include <stdint.h> +#include <amdblocks/acpimmio.h> +#include <bootblock_common.h> #include <device/pci_ops.h> +#include <southbridge/amd/pi/hudson/hudson.h>
/* * Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF. @@ -61,8 +64,6 @@ hudson_enable_rom(); }
-#if !CONFIG(ROMCC_BOOTBLOCK) - #include <bootblock_common.h> #include <amdblocks/acpimmio.h> #include <southbridge/amd/pi/hudson/hudson.h> @@ -111,4 +112,3 @@ */ pm_write8(0xd2, 0); } -#endif
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37799 )
Change subject: src: Get rid of ROMCC_BOOTBLOCK ......................................................................
Patch Set 1:
duplicate of CB:37440
Hello Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37799
to look at the new patch set (#2).
Change subject: src: Get rid of ROMCC_BOOTBLOCK ......................................................................
src: Get rid of ROMCC_BOOTBLOCK
Change-Id: I532f2dfc02b4f2a8ef4f4ed1636506da0f86886a Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/Kconfig M src/drivers/amd/agesa/Makefile.inc M src/drivers/amd/agesa/romstage.c M src/northbridge/amd/agesa/family14/state_machine.c M src/southbridge/amd/agesa/hudson/Makefile.inc M src/southbridge/amd/agesa/hudson/bootblock.c M src/southbridge/amd/cimx/sb800/Makefile.inc M src/southbridge/amd/cimx/sb800/bootblock.c M src/southbridge/amd/pi/hudson/Makefile.inc M src/southbridge/amd/pi/hudson/bootblock.c 10 files changed, 9 insertions(+), 61 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/37799/2
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37799 )
Change subject: src: Get rid of ROMCC_BOOTBLOCK ......................................................................
Patch Set 2: Code-Review-2
While correct, lets land the one with discussion CB:37440
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37799 )
Change subject: src: Get rid of ROMCC_BOOTBLOCK ......................................................................
Patch Set 2: Code-Review-1
HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/37799 )
Change subject: src: Get rid of ROMCC_BOOTBLOCK ......................................................................
Abandoned
see CB:37440
-
HAOUAS Elyes (Code Review) -
Kyösti Mälkki (Code Review)