Change in coreboot[master]: libpayload/pci: Split PCI interfaces as common and chip related

[Jianjun Wang (Code Review)]

Attention is currently required from: Shelley Chen, Hung-Te Lin, Yu-Ping Wu.
Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56789 )

Change subject: libpayload/pci: Split PCI interfaces as common and chip related
......................................................................

Patch Set 13:

(1 comment)

File payloads/libpayload/Kconfig:

https://review.coreboot.org/c/coreboot/+/56789/comment/4e772d89_5e355c3e 
PS12, Line 418:
> Similar to coreboot's implementation, could we add ECAM_MMCONF_SUPPORT and ECAM_MMCONF_BASE_ADDRESS?

I don't think we need to add these configs.
For Intel platform, pci_io_ops.c will be used, and it already has the register information which the x86 platform is needed.
For other platforms(e.g. Mediatek) which does not support ECAM, they should provide 'pci_map_bus()' function like coreboot did to get the address of each device's config space, all they need is the register base address of PCIe hardware(CL:56794). I think maybe we can define this address or pass this information from the users(e.g. depthcharge).
Is that okay for you, what do you think?