Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48442 )
Change subject: DO-NOT-SUBMIT: Asurada ToT - Load firmware API ......................................................................
DO-NOT-SUBMIT: Asurada ToT - Load firmware API
Snapshot of dev ToT #44 excluding mcu patches.
Change-Id: Ia76eacef6c22c3ed882e4ef72e94576098baa20c Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M 3rdparty/amd_blobs M 3rdparty/blobs M 3rdparty/intel-microcode M 3rdparty/qc_blobs M README.md M src/mainboard/google/asurada/Kconfig M src/mainboard/google/asurada/Makefile.inc M src/mainboard/google/asurada/mainboard.c A src/mainboard/google/asurada/panel.h A src/mainboard/google/asurada/panel_anx7625.c M src/mainboard/google/asurada/sdram_configs.c M src/mainboard/google/asurada/sdram_params/Makefile.inc A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB.c M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB.c M src/soc/mediatek/common/i2c.c M src/soc/mediatek/common/include/soc/i2c_common.h M src/soc/mediatek/common/include/soc/rtc_common.h M src/soc/mediatek/common/rtc.c M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/bootblock.c A src/soc/mediatek/mt8192/clkbuf.c A src/soc/mediatek/mt8192/ddp.c A src/soc/mediatek/mt8192/devapc.c A src/soc/mediatek/mt8192/dramc_ana_init_config.c A src/soc/mediatek/mt8192/dramc_dig_config.c A src/soc/mediatek/mt8192/dramc_dvfs.c A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_calibration_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_power.c A src/soc/mediatek/mt8192/dramc_subsys_config.c A src/soc/mediatek/mt8192/dramc_tracking.c A src/soc/mediatek/mt8192/dramc_utility.c A src/soc/mediatek/mt8192/dsi.c A src/soc/mediatek/mt8192/eint_event.c M src/soc/mediatek/mt8192/emi.c A src/soc/mediatek/mt8192/i2c.c M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/clkbuf.h A src/soc/mediatek/mt8192/include/soc/ddp.h A src/soc/mediatek/mt8192/include/soc/devapc.h A src/soc/mediatek/mt8192/include/soc/dramc_ac_timing.h M src/soc/mediatek/mt8192/include/soc/dramc_param.h A src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h A src/soc/mediatek/mt8192/include/soc/dramc_power.h A src/soc/mediatek/mt8192/include/soc/dramc_register.h A src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h A src/soc/mediatek/mt8192/include/soc/dsi.h A src/soc/mediatek/mt8192/include/soc/eint_event.h A src/soc/mediatek/mt8192/include/soc/i2c.h M src/soc/mediatek/mt8192/include/soc/pll.h M src/soc/mediatek/mt8192/include/soc/pmif.h A src/soc/mediatek/mt8192/include/soc/rtc.h A src/soc/mediatek/mt8192/include/soc/srclken_rc.h A src/soc/mediatek/mt8192/include/soc/ufs.h M src/soc/mediatek/mt8192/memory.c M src/soc/mediatek/mt8192/mt6359p.c M src/soc/mediatek/mt8192/pll.c M src/soc/mediatek/mt8192/pmif.c A src/soc/mediatek/mt8192/rtc.c M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/srclken_rc.c A src/soc/mediatek/mt8192/ufs.c 66 files changed, 22,780 insertions(+), 61 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/48442/1
Hello Hung-Te Lin, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48442
to look at the new patch set (#2).
Change subject: DO-NOT-SUBMIT: Asurada ToT - Load firmware API ......................................................................
DO-NOT-SUBMIT: Asurada ToT - Load firmware API
Snapshot of dev ToT #44 excluding mcu patches.
Change-Id: Ia76eacef6c22c3ed882e4ef72e94576098baa20c Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M 3rdparty/amd_blobs M 3rdparty/blobs M 3rdparty/intel-microcode M 3rdparty/qc_blobs M README.md M src/mainboard/google/asurada/Kconfig M src/mainboard/google/asurada/Makefile.inc M src/mainboard/google/asurada/mainboard.c A src/mainboard/google/asurada/panel.h A src/mainboard/google/asurada/panel_anx7625.c M src/mainboard/google/asurada/sdram_configs.c M src/mainboard/google/asurada/sdram_params/Makefile.inc A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB.c M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB.c M src/soc/mediatek/common/i2c.c M src/soc/mediatek/common/include/soc/i2c_common.h M src/soc/mediatek/common/include/soc/rtc_common.h M src/soc/mediatek/common/rtc.c M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/bootblock.c A src/soc/mediatek/mt8192/clkbuf.c A src/soc/mediatek/mt8192/ddp.c A src/soc/mediatek/mt8192/devapc.c A src/soc/mediatek/mt8192/dramc_ana_init_config.c A src/soc/mediatek/mt8192/dramc_dig_config.c A src/soc/mediatek/mt8192/dramc_dvfs.c A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_calibration_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_power.c A src/soc/mediatek/mt8192/dramc_subsys_config.c A src/soc/mediatek/mt8192/dramc_tracking.c A src/soc/mediatek/mt8192/dramc_utility.c A src/soc/mediatek/mt8192/dsi.c A src/soc/mediatek/mt8192/eint_event.c M src/soc/mediatek/mt8192/emi.c A src/soc/mediatek/mt8192/i2c.c M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/clkbuf.h A src/soc/mediatek/mt8192/include/soc/ddp.h A src/soc/mediatek/mt8192/include/soc/devapc.h A src/soc/mediatek/mt8192/include/soc/dramc_ac_timing.h M src/soc/mediatek/mt8192/include/soc/dramc_param.h A src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h A src/soc/mediatek/mt8192/include/soc/dramc_power.h A src/soc/mediatek/mt8192/include/soc/dramc_register.h A src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h A src/soc/mediatek/mt8192/include/soc/dsi.h A src/soc/mediatek/mt8192/include/soc/eint_event.h A src/soc/mediatek/mt8192/include/soc/i2c.h M src/soc/mediatek/mt8192/include/soc/pll.h M src/soc/mediatek/mt8192/include/soc/pmif.h A src/soc/mediatek/mt8192/include/soc/rtc.h A src/soc/mediatek/mt8192/include/soc/srclken_rc.h A src/soc/mediatek/mt8192/include/soc/ufs.h M src/soc/mediatek/mt8192/memory.c M src/soc/mediatek/mt8192/mt6359p.c M src/soc/mediatek/mt8192/pll.c M src/soc/mediatek/mt8192/pmif.c A src/soc/mediatek/mt8192/rtc.c M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/srclken_rc.c A src/soc/mediatek/mt8192/ufs.c 66 files changed, 22,780 insertions(+), 61 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/48442/2
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48442 )
Change subject: DO-NOT-SUBMIT: Asurada ToT - Load firmware API ......................................................................
Patch Set 2:
(26 comments)
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_ana_init_config.c:
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/dra... PS2, Line 1182: dq_pick = (tr->dq_semi_open == 1) ? 0 : (data_rate/2) ; space prohibited before semicolon
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/dra... PS2, Line 1206: (ca_pick * 2 *(tr->ca_ckdiv4_en + 1))) ? need consistent spacing around '*' (ctx:WxV)
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/dra... PS2, Line 386: if (loop_cnt > early_break_cnt) Too many leading tabs - consider code refactoring
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/dra... PS2, Line 2428: if ((vref_win_perbit[bit].last_pass != Too many leading tabs - consider code refactoring
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/dra... PS2, Line 2435: if (perbit_winsum > TX_PASS_WIN_CRITERIA) Too many leading tabs - consider code refactoring
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/dra... PS2, Line 201: SET32_BITFIELDS(&ch[chn].ao.shu_ac_time_05t, SHU_AC_TIME_05T_TRFC_05T, trfc_05t); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/dra... PS2, Line 204: SET32_BITFIELDS(&ch[chn].ao.shu_ac_time_05t, SHU_AC_TIME_05T_TRFCPB_05T, trfrc_pb05t); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/inc... PS2, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/inc... PS2, Line 316: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/inc... PS2, Line 319: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/inc... PS2, Line 328: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/inc... PS2, Line 343: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/inc... PS2, Line 352: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/inc... PS2, Line 361: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/inc... PS2, Line 363: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/rtc.h:
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/inc... PS2, Line 101: RTC_GP_OSC32_CON = 2U << 13, /* Keep RG_EOSC_RSV[0] to low for lower leakage current hw design change */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/inc... PS2, Line 106: OSC32CON_ANALOG_SETTING = RTC_GP_OSC32_CON | RTC_EOSC32_CHOP_EN | RTC_EOSC32_VCT_EN |\ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/inc... PS2, Line 107: RTC_GPS_CKOUT_EN | RTC_EMBCK_SEL_OPTION | RTC_EMB_K_EOSC32_MODE line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/pll... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/pll... PS2, Line 439: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/pll... PS2, Line 441: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/rtc... File src/soc/mediatek/mt8192/rtc.c:
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/rtc... PS2, Line 179: if (middle == left) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/rtc... PS2, Line 184: if (val >= RTC_FQMTR_LOW_BASE && val <= RTC_FQMTR_HIGH_BASE) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/rtc... PS2, Line 187: if (val > RTC_FQMTR_HIGH_BASE) { braces {} are not necessary for any arm of this statement
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/rtc... PS2, Line 190: else { else should follow close brace '}'
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/rtc... PS2, Line 296: rtc_write(RTC_BBPU, (bbpu | RTC_BBPU_KEY | RTC_BBPU_RESET_ALARM | RTC_BBPU_RESET_SPAR) & (~RTC_BBPU_SPAR_SW)); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/2/src/soc/mediatek/mt8192/rtc... PS2, Line 362: rtc_write(RTC_AL_YEA, (year | RTC_K_EOSC_RSV_0) & (~RTC_K_EOSC_RSV_1) & (~RTC_K_EOSC_RSV_2)); line over 96 characters
Yidi Lin has removed Hung-Te Lin from this change. ( https://review.coreboot.org/c/coreboot/+/48442 )
Change subject: DO-NOT-SUBMIT: Asurada ToT - Load firmware API ......................................................................
Removed reviewer Hung-Te Lin.
Yidi Lin has removed Martin Roth from this change. ( https://review.coreboot.org/c/coreboot/+/48442 )
Change subject: DO-NOT-SUBMIT: Asurada ToT - Load firmware API ......................................................................
Removed reviewer Martin Roth.
Yidi Lin has removed Patrick Georgi from this change. ( https://review.coreboot.org/c/coreboot/+/48442 )
Change subject: DO-NOT-SUBMIT: Asurada ToT - Load firmware API ......................................................................
Removed reviewer Patrick Georgi.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48442
to look at the new patch set (#3).
Change subject: DO-NOT-SUBMIT: Asurada ToT - Load firmware API ......................................................................
DO-NOT-SUBMIT: Asurada ToT - Load firmware API
Snapshot of dev ToT #44 excluding mcu patches.
Change-Id: Ia76eacef6c22c3ed882e4ef72e94576098baa20c Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M 3rdparty/amd_blobs M 3rdparty/blobs M 3rdparty/intel-microcode M 3rdparty/qc_blobs M README.md M src/mainboard/google/asurada/Kconfig M src/mainboard/google/asurada/Makefile.inc M src/mainboard/google/asurada/mainboard.c A src/mainboard/google/asurada/panel.h A src/mainboard/google/asurada/panel_anx7625.c M src/mainboard/google/asurada/sdram_configs.c M src/mainboard/google/asurada/sdram_params/Makefile.inc A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB.c M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB.c M src/soc/mediatek/common/i2c.c M src/soc/mediatek/common/include/soc/i2c_common.h M src/soc/mediatek/common/include/soc/rtc_common.h M src/soc/mediatek/common/rtc.c M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/bootblock.c A src/soc/mediatek/mt8192/clkbuf.c A src/soc/mediatek/mt8192/ddp.c A src/soc/mediatek/mt8192/devapc.c A src/soc/mediatek/mt8192/dramc_ana_init_config.c A src/soc/mediatek/mt8192/dramc_dig_config.c A src/soc/mediatek/mt8192/dramc_dvfs.c A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_calibration_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_power.c A src/soc/mediatek/mt8192/dramc_subsys_config.c A src/soc/mediatek/mt8192/dramc_tracking.c A src/soc/mediatek/mt8192/dramc_utility.c A src/soc/mediatek/mt8192/dsi.c A src/soc/mediatek/mt8192/eint_event.c M src/soc/mediatek/mt8192/emi.c A src/soc/mediatek/mt8192/i2c.c M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/clkbuf.h A src/soc/mediatek/mt8192/include/soc/ddp.h A src/soc/mediatek/mt8192/include/soc/devapc.h A src/soc/mediatek/mt8192/include/soc/dramc_ac_timing.h M src/soc/mediatek/mt8192/include/soc/dramc_param.h A src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h A src/soc/mediatek/mt8192/include/soc/dramc_power.h A src/soc/mediatek/mt8192/include/soc/dramc_register.h A src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h A src/soc/mediatek/mt8192/include/soc/dsi.h A src/soc/mediatek/mt8192/include/soc/eint_event.h A src/soc/mediatek/mt8192/include/soc/i2c.h M src/soc/mediatek/mt8192/include/soc/pll.h M src/soc/mediatek/mt8192/include/soc/pmif.h A src/soc/mediatek/mt8192/include/soc/rtc.h A src/soc/mediatek/mt8192/include/soc/srclken_rc.h A src/soc/mediatek/mt8192/include/soc/ufs.h M src/soc/mediatek/mt8192/memory.c M src/soc/mediatek/mt8192/mt6359p.c M src/soc/mediatek/mt8192/pll.c M src/soc/mediatek/mt8192/pmif.c A src/soc/mediatek/mt8192/rtc.c M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/srclken_rc.c A src/soc/mediatek/mt8192/ufs.c 66 files changed, 22,780 insertions(+), 61 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/48442/3
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48442 )
Change subject: DO-NOT-SUBMIT: Asurada ToT - Load firmware API ......................................................................
Patch Set 3:
(26 comments)
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_ana_init_config.c:
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/dra... PS3, Line 1182: dq_pick = (tr->dq_semi_open == 1) ? 0 : (data_rate/2) ; space prohibited before semicolon
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/dra... PS3, Line 1206: (ca_pick * 2 *(tr->ca_ckdiv4_en + 1))) ? need consistent spacing around '*' (ctx:WxV)
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/dra... PS3, Line 386: if (loop_cnt > early_break_cnt) Too many leading tabs - consider code refactoring
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/dra... PS3, Line 2428: if ((vref_win_perbit[bit].last_pass != Too many leading tabs - consider code refactoring
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/dra... PS3, Line 2435: if (perbit_winsum > TX_PASS_WIN_CRITERIA) Too many leading tabs - consider code refactoring
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/dra... PS3, Line 201: SET32_BITFIELDS(&ch[chn].ao.shu_ac_time_05t, SHU_AC_TIME_05T_TRFC_05T, trfc_05t); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/dra... PS3, Line 204: SET32_BITFIELDS(&ch[chn].ao.shu_ac_time_05t, SHU_AC_TIME_05T_TRFCPB_05T, trfrc_pb05t); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/inc... PS3, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/inc... PS3, Line 316: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/inc... PS3, Line 319: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/inc... PS3, Line 328: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/inc... PS3, Line 343: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/inc... PS3, Line 352: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/inc... PS3, Line 361: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/inc... PS3, Line 363: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/rtc.h:
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/inc... PS3, Line 101: RTC_GP_OSC32_CON = 2U << 13, /* Keep RG_EOSC_RSV[0] to low for lower leakage current hw design change */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/inc... PS3, Line 106: OSC32CON_ANALOG_SETTING = RTC_GP_OSC32_CON | RTC_EOSC32_CHOP_EN | RTC_EOSC32_VCT_EN |\ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/inc... PS3, Line 107: RTC_GPS_CKOUT_EN | RTC_EMBCK_SEL_OPTION | RTC_EMB_K_EOSC32_MODE line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/pll... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/pll... PS3, Line 439: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/pll... PS3, Line 441: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/rtc... File src/soc/mediatek/mt8192/rtc.c:
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/rtc... PS3, Line 179: if (middle == left) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/rtc... PS3, Line 184: if (val >= RTC_FQMTR_LOW_BASE && val <= RTC_FQMTR_HIGH_BASE) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/rtc... PS3, Line 187: if (val > RTC_FQMTR_HIGH_BASE) { braces {} are not necessary for any arm of this statement
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/rtc... PS3, Line 190: else { else should follow close brace '}'
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/rtc... PS3, Line 296: rtc_write(RTC_BBPU, (bbpu | RTC_BBPU_KEY | RTC_BBPU_RESET_ALARM | RTC_BBPU_RESET_SPAR) & (~RTC_BBPU_SPAR_SW)); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/3/src/soc/mediatek/mt8192/rtc... PS3, Line 362: rtc_write(RTC_AL_YEA, (year | RTC_K_EOSC_RSV_0) & (~RTC_K_EOSC_RSV_1) & (~RTC_K_EOSC_RSV_2)); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48442 )
Change subject: DO-NOT-SUBMIT: Asurada ToT - Load firmware API ......................................................................
Patch Set 4:
(26 comments)
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_ana_init_config.c:
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/dra... PS4, Line 1182: dq_pick = (tr->dq_semi_open == 1) ? 0 : (data_rate/2) ; space prohibited before semicolon
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/dra... PS4, Line 1206: (ca_pick * 2 *(tr->ca_ckdiv4_en + 1))) ? need consistent spacing around '*' (ctx:WxV)
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/dra... PS4, Line 386: if (loop_cnt > early_break_cnt) Too many leading tabs - consider code refactoring
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/dra... PS4, Line 2428: if ((vref_win_perbit[bit].last_pass != Too many leading tabs - consider code refactoring
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/dra... PS4, Line 2435: if (perbit_winsum > TX_PASS_WIN_CRITERIA) Too many leading tabs - consider code refactoring
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/dra... PS4, Line 201: SET32_BITFIELDS(&ch[chn].ao.shu_ac_time_05t, SHU_AC_TIME_05T_TRFC_05T, trfc_05t); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/dra... PS4, Line 204: SET32_BITFIELDS(&ch[chn].ao.shu_ac_time_05t, SHU_AC_TIME_05T_TRFCPB_05T, trfrc_pb05t); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/inc... PS4, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/inc... PS4, Line 316: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/inc... PS4, Line 319: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/inc... PS4, Line 328: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/inc... PS4, Line 343: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/inc... PS4, Line 352: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/inc... PS4, Line 361: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/inc... PS4, Line 363: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/rtc.h:
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/inc... PS4, Line 101: RTC_GP_OSC32_CON = 2U << 13, /* Keep RG_EOSC_RSV[0] to low for lower leakage current hw design change */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/inc... PS4, Line 106: OSC32CON_ANALOG_SETTING = RTC_GP_OSC32_CON | RTC_EOSC32_CHOP_EN | RTC_EOSC32_VCT_EN |\ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/inc... PS4, Line 107: RTC_GPS_CKOUT_EN | RTC_EMBCK_SEL_OPTION | RTC_EMB_K_EOSC32_MODE line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/pll... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/pll... PS4, Line 439: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/pll... PS4, Line 441: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/rtc... File src/soc/mediatek/mt8192/rtc.c:
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/rtc... PS4, Line 179: if (middle == left) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/rtc... PS4, Line 184: if (val >= RTC_FQMTR_LOW_BASE && val <= RTC_FQMTR_HIGH_BASE) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/rtc... PS4, Line 187: if (val > RTC_FQMTR_HIGH_BASE) { braces {} are not necessary for any arm of this statement
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/rtc... PS4, Line 190: else { else should follow close brace '}'
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/rtc... PS4, Line 296: rtc_write(RTC_BBPU, (bbpu | RTC_BBPU_KEY | RTC_BBPU_RESET_ALARM | RTC_BBPU_RESET_SPAR) & (~RTC_BBPU_SPAR_SW)); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/4/src/soc/mediatek/mt8192/rtc... PS4, Line 362: rtc_write(RTC_AL_YEA, (year | RTC_K_EOSC_RSV_0) & (~RTC_K_EOSC_RSV_1) & (~RTC_K_EOSC_RSV_2)); line over 96 characters
Hello Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48442
to look at the new patch set (#5).
Change subject: DO-NOT-SUBMIT: Asurada ToT - Load firmware API ......................................................................
DO-NOT-SUBMIT: Asurada ToT - Load firmware API
Snapshot of dev ToT #44 excluding mcu patches.
Change-Id: Ia76eacef6c22c3ed882e4ef72e94576098baa20c Signed-off-by: Yidi Lin yidi.lin@mediatek.com --- M 3rdparty/amd_blobs M 3rdparty/blobs M 3rdparty/intel-microcode M 3rdparty/qc_blobs M README.md M src/mainboard/google/asurada/Kconfig M src/mainboard/google/asurada/Makefile.inc M src/mainboard/google/asurada/mainboard.c A src/mainboard/google/asurada/panel.h A src/mainboard/google/asurada/panel_anx7625.c M src/mainboard/google/asurada/sdram_configs.c M src/mainboard/google/asurada/sdram_params/Makefile.inc A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB.c M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB.c M src/soc/mediatek/common/i2c.c M src/soc/mediatek/common/include/soc/i2c_common.h M src/soc/mediatek/common/include/soc/rtc_common.h M src/soc/mediatek/common/rtc.c M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/bootblock.c A src/soc/mediatek/mt8192/clkbuf.c A src/soc/mediatek/mt8192/ddp.c A src/soc/mediatek/mt8192/devapc.c A src/soc/mediatek/mt8192/dramc_ana_init_config.c A src/soc/mediatek/mt8192/dramc_dig_config.c A src/soc/mediatek/mt8192/dramc_dvfs.c A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_calibration_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_power.c A src/soc/mediatek/mt8192/dramc_subsys_config.c A src/soc/mediatek/mt8192/dramc_tracking.c A src/soc/mediatek/mt8192/dramc_utility.c A src/soc/mediatek/mt8192/dsi.c A src/soc/mediatek/mt8192/eint_event.c M src/soc/mediatek/mt8192/emi.c A src/soc/mediatek/mt8192/i2c.c M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/clkbuf.h A src/soc/mediatek/mt8192/include/soc/ddp.h A src/soc/mediatek/mt8192/include/soc/devapc.h A src/soc/mediatek/mt8192/include/soc/dramc_ac_timing.h M src/soc/mediatek/mt8192/include/soc/dramc_param.h A src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h A src/soc/mediatek/mt8192/include/soc/dramc_power.h A src/soc/mediatek/mt8192/include/soc/dramc_register.h A src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h A src/soc/mediatek/mt8192/include/soc/dsi.h A src/soc/mediatek/mt8192/include/soc/eint_event.h A src/soc/mediatek/mt8192/include/soc/i2c.h M src/soc/mediatek/mt8192/include/soc/pll.h M src/soc/mediatek/mt8192/include/soc/pmif.h A src/soc/mediatek/mt8192/include/soc/rtc.h A src/soc/mediatek/mt8192/include/soc/srclken_rc.h A src/soc/mediatek/mt8192/include/soc/ufs.h M src/soc/mediatek/mt8192/memory.c M src/soc/mediatek/mt8192/mt6359p.c M src/soc/mediatek/mt8192/pll.c M src/soc/mediatek/mt8192/pmif.c A src/soc/mediatek/mt8192/rtc.c M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/srclken_rc.c A src/soc/mediatek/mt8192/ufs.c 66 files changed, 22,780 insertions(+), 61 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/48442/5
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48442 )
Change subject: DO-NOT-SUBMIT: Asurada ToT - Load firmware API ......................................................................
Patch Set 5:
(26 comments)
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_ana_init_config.c:
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/dra... PS5, Line 1182: dq_pick = (tr->dq_semi_open == 1) ? 0 : (data_rate/2) ; space prohibited before semicolon
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/dra... PS5, Line 1206: (ca_pick * 2 *(tr->ca_ckdiv4_en + 1))) ? need consistent spacing around '*' (ctx:WxV)
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/dra... PS5, Line 386: if (loop_cnt > early_break_cnt) Too many leading tabs - consider code refactoring
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/dra... PS5, Line 2428: if ((vref_win_perbit[bit].last_pass != Too many leading tabs - consider code refactoring
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/dra... PS5, Line 2435: if (perbit_winsum > TX_PASS_WIN_CRITERIA) Too many leading tabs - consider code refactoring
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/dra... PS5, Line 201: SET32_BITFIELDS(&ch[chn].ao.shu_ac_time_05t, SHU_AC_TIME_05T_TRFC_05T, trfc_05t); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/dra... PS5, Line 204: SET32_BITFIELDS(&ch[chn].ao.shu_ac_time_05t, SHU_AC_TIME_05T_TRFCPB_05T, trfrc_pb05t); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/inc... PS5, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/inc... PS5, Line 316: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/inc... PS5, Line 319: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/inc... PS5, Line 328: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/inc... PS5, Line 343: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/inc... PS5, Line 352: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/inc... PS5, Line 361: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/inc... PS5, Line 363: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/rtc.h:
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/inc... PS5, Line 101: RTC_GP_OSC32_CON = 2U << 13, /* Keep RG_EOSC_RSV[0] to low for lower leakage current hw design change */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/inc... PS5, Line 106: OSC32CON_ANALOG_SETTING = RTC_GP_OSC32_CON | RTC_EOSC32_CHOP_EN | RTC_EOSC32_VCT_EN |\ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/inc... PS5, Line 107: RTC_GPS_CKOUT_EN | RTC_EMBCK_SEL_OPTION | RTC_EMB_K_EOSC32_MODE line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/pll... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/pll... PS5, Line 439: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/pll... PS5, Line 441: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/rtc... File src/soc/mediatek/mt8192/rtc.c:
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/rtc... PS5, Line 179: if (middle == left) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/rtc... PS5, Line 184: if (val >= RTC_FQMTR_LOW_BASE && val <= RTC_FQMTR_HIGH_BASE) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/rtc... PS5, Line 187: if (val > RTC_FQMTR_HIGH_BASE) { braces {} are not necessary for any arm of this statement
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/rtc... PS5, Line 190: else { else should follow close brace '}'
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/rtc... PS5, Line 296: rtc_write(RTC_BBPU, (bbpu | RTC_BBPU_KEY | RTC_BBPU_RESET_ALARM | RTC_BBPU_RESET_SPAR) & (~RTC_BBPU_SPAR_SW)); line over 96 characters
https://review.coreboot.org/c/coreboot/+/48442/5/src/soc/mediatek/mt8192/rtc... PS5, Line 362: rtc_write(RTC_AL_YEA, (year | RTC_K_EOSC_RSV_0) & (~RTC_K_EOSC_RSV_1) & (~RTC_K_EOSC_RSV_2)); line over 96 characters
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48442 )
Change subject: DO-NOT-SUBMIT: Asurada ToT - Load firmware API ......................................................................
Patch Set 5:
please abandon this tot since all changes were loaded.
Yidi Lin has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/48442 )
Change subject: DO-NOT-SUBMIT: Asurada ToT - Load firmware API ......................................................................
Abandoned
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Hung-Te Lin (Code Review)
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Yidi Lin (Code Review)