Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38060 )
Change subject: mb/gigabyte/ga-b75m-d3h/devicetree.cb: Drop zero fields ......................................................................
mb/gigabyte/ga-b75m-d3h/devicetree.cb: Drop zero fields
They default to zero already.
Change-Id: I76bbf4593c43ce24c28568f1b8faefb1be81b4cb Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb 1 file changed, 0 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/38060/1
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb index b5a10fc..e581470 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb +++ b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb @@ -30,8 +30,6 @@ end
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH - # GPI routing - register "alt_gp_smi_en" = "0x0000" register "gen1_dec" = "0x003c0a01"
# Set max SATA speed to 6.0 Gb/s @@ -41,8 +39,6 @@ register "xhci_switchable_ports" = "0xf" register "superspeed_capable_ports" = "0xf"
- register "pcie_port_coalesce" = "0" - register "docking_supported" = "0" register "c2_latency" = "0x0065"
device pci 14.0 on # USB 3.0 Controller
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38060 )
Change subject: mb/gigabyte/ga-b75m-d3h/devicetree.cb: Drop zero fields ......................................................................
Patch Set 1: Code-Review+2
Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38060 )
Change subject: mb/gigabyte/ga-b75m-d3h/devicetree.cb: Drop zero fields ......................................................................
mb/gigabyte/ga-b75m-d3h/devicetree.cb: Drop zero fields
They default to zero already.
Change-Id: I76bbf4593c43ce24c28568f1b8faefb1be81b4cb Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38060 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb 1 file changed, 0 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb index b5a10fc..e581470 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb +++ b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb @@ -30,8 +30,6 @@ end
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH - # GPI routing - register "alt_gp_smi_en" = "0x0000" register "gen1_dec" = "0x003c0a01"
# Set max SATA speed to 6.0 Gb/s @@ -41,8 +39,6 @@ register "xhci_switchable_ports" = "0xf" register "superspeed_capable_ports" = "0xf"
- register "pcie_port_coalesce" = "0" - register "docking_supported" = "0" register "c2_latency" = "0x0065"
device pci 14.0 on # USB 3.0 Controller
-
Angel Pons (Code Review) -
Nico Huber (Code Review)