Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35874 )
Change subject: intel/{baytrail,braswell}: Use a Kconfig symbol for max PCI BUS number ......................................................................
intel/{baytrail,braswell}: Use a Kconfig symbol for max PCI BUS number
Change-Id: Ia7364b454feeca0c5f8db5fa72400cc8b078bd28 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/acpi.c M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/acpi.c 4 files changed, 12 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/35874/1
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index c833c53..bf0e221 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -51,6 +51,10 @@ hex default 0xe0000000
+config MMCONF_BUS_NUMBER + int + default 256 + config MAX_CPUS int default 4 diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index c322cce..add5ec2 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -165,7 +165,8 @@ unsigned long acpi_fill_mcfg(unsigned long current) { current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current, - MCFG_BASE_ADDRESS, 0, 0, 255); + MCFG_BASE_ADDRESS, 0, 0, + CONFIG_MMCONF_BUS_NUMBER - 1); return current; }
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 5d6438f..edb64ac 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -69,6 +69,10 @@ hex default 0xe0000000
+config MMCONF_BUS_NUMBER + int + default 256 + config MAX_CPUS int default 4 diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index dbd2950..c738869 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -140,7 +140,8 @@ unsigned long acpi_fill_mcfg(unsigned long current) { current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current, - MCFG_BASE_ADDRESS, 0, 0, 255); + MCFG_BASE_ADDRESS, 0, 0, + CONFIG_MMCONF_BUS_NUMBER - 1); return current; }
Hello Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35874
to look at the new patch set (#2).
Change subject: intel/{baytrail,braswell}: Use a Kconfig symbol for max PCI BUS number ......................................................................
intel/{baytrail,braswell}: Use a Kconfig symbol for max PCI BUS number
Change-Id: Ia7364b454feeca0c5f8db5fa72400cc8b078bd28 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/acpi.c M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/acpi.c 4 files changed, 12 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/35874/2
Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35874 )
Change subject: intel/{baytrail,braswell}: Use a Kconfig symbol for max PCI BUS number ......................................................................
Patch Set 3: Code-Review+2
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35874 )
Change subject: intel/{baytrail,braswell}: Use a Kconfig symbol for max PCI BUS number ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35874/4/src/soc/intel/baytrail/Kcon... File src/soc/intel/baytrail/Kconfig:
https://review.coreboot.org/c/coreboot/+/35874/4/src/soc/intel/baytrail/Kcon... PS4, Line 54: config MMCONF_BUS_NUMBER The name is very misleading. How about bus count? number of buses? max bus number (and adapt the calculation)?
Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/35874 )
Change subject: intel/{baytrail,braswell}: Use a Kconfig symbol for max PCI BUS number ......................................................................
Abandoned
Fixed in master