Ana Carolina Cabral has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86084?usp=email )
Change subject: mb/amd/birman_plus/ec: register bits ......................................................................
mb/amd/birman_plus/ec: register bits
Rectify wrong EC module ECRAM registers bits based on PI source code 1.0.0.1b
Change-Id: I1a13d99a55a4aa02a5cb0e67ffa4ed555f91a471 Signed-off-by: Ana Carolina Cabral ana.cabral@amd.com --- M src/mainboard/amd/birman_plus/ec.c 1 file changed, 37 insertions(+), 41 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/86084/1
diff --git a/src/mainboard/amd/birman_plus/ec.c b/src/mainboard/amd/birman_plus/ec.c index 1fc5e3e..e02be05 100644 --- a/src/mainboard/amd/birman_plus/ec.c +++ b/src/mainboard/amd/birman_plus/ec.c @@ -8,6 +8,9 @@ #define BIRMAN_EC_CMD 0x666 #define BIRMAN_EC_DATA 0x662
+#define EC_GPIO_0_ADDR 0xA0 +#define EC0_EVAL_PRSNTn BIT(2) + #define EC_GPIO_1_ADDR 0xA1 #define EC1_EVAL_PWREN BIT(1)
@@ -23,22 +26,25 @@ #define EC3_LOM_RST_AUX BIT(1) #define EC3_EVAL_RST_AUX BIT(0)
+#define EC_GPIO_6_ADDR 0xA6 +#define EC6_TPNL_BUF_EN BIT(1) +#define EC6_TPAD_BUF_EN BIT(0) + #define EC_GPIO_7_ADDR 0xA7 #define EC7_WWAN_PWR_OFF_N BIT(7) -#define EC7_BT_RADIO_DIS BIT(2) -#define EC7_WL_RADIO_DIS BIT(0) +#define EC7_BT_RADIO_DIS BIT(2) +#define EC7_WL_RADIO_DIS_N BIT(0)
#define EC_GPIO_8_ADDR 0xA8 #define EC8_ADAPTER_OFF BIT(5) #define EC8_EVAL_SMBUS1_N_SW BIT(3) #define EC8_MP2_SEL BIT(2) -#define EC8_DT_N_SSD1_SW BIT(1)
#define EC_GPIO_9_ADDR 0xA9 #define EC9_CAM0_PWR_EN BIT(7) #define EC9_CAM1_PWR_EN BIT(6) -#define EC9_WWAN_RST BIT(5) -#define EC9_DT_PWREN BIT(2) +#define EC9_WWAN_RST_N BIT(5) +#define EC9_SSD1_PWREN BIT(2) #define EC9_TPM_PWR_EN BIT(1) #define EC9_TPM_S0I3_N BIT(0)
@@ -52,15 +58,9 @@ #define ECA_SMBUS1_EN BIT(1) #define ECA_SMBUS0_EN BIT(0)
-#define EC_GPIO_C_ADDR 0xAC -#define ECC_TPNL_BUF_EN BIT(6) -#define ECC_TPAD_BUF_EN BIT(5) -#define ECC_NFC_BUF_EN BIT(4) - #define EC_GPIO_D_ADDR 0xAD #define ECD_TPNL_PWR_EN BIT(7) #define ECD_TPNL_EN BIT(6) -#define ECD_SSD1_PWR_EN BIT(5) #define ECD_FPR_PWR_EN BIT(3) #define ECD_FPR_OFF_N BIT(2) #define ECD_FPR_LOCK_N BIT(1) @@ -73,19 +73,19 @@ #define ECE_WLAN_PWR_EN BIT(4) #define ECE_WWAN_PWR_EN BIT(3) #define ECE_CAM_PWR_EN BIT(2) -#define ECE_FPR_N_GBE_SEL BIT(1) -#define ECE_BT_N_TPNL_SEL BIT(0) +#define ECE_FPR_N_GBE_SEL BIT(1) //USB5_MUX_FPR#_GBE_SEL +#define ECE_BT_N_TPNL_SEL BIT(0) //USB6_MUX_BT#_TPNL_SEL
#define EC_GPIO_F_ADDR 0xAF #define ECF_CAM_FW_WP_N BIT(7) #define ECF_I2C_MUX_OE_N BIT(4) -#define ECF_WLAN0_N_WWAN1_SW BIT(1) -#define ECF_WWAN0_N_WLAN1_SW BIT(0) +#define ECF_SDE_N_WLAN1_SW BIT(1) +#define ECF_GBE_N_WWAN1_SW BIT(0)
#define EC_GPIO_G_ADDR 0xB0 #define ECG_IR_LED_PWR_EN BIT(7) #define ECG_U0_WLAN_HDR_SEL BIT(6) -#define ECG_DT_SSD1_MUX_OFF BIT(5) +#define ECG_NFC_BUF_EN BIT(5) #define ECG_WLAN_WWAN_MUX_OFF BIT(4)
static void configure_ec_gpio(void) @@ -124,13 +124,13 @@
tmp = ec_read(EC_GPIO_7_ADDR); tmp &= ~EC7_BT_RADIO_DIS; - tmp &= ~EC7_WL_RADIO_DIS; - tmp |= EC7_WWAN_PWR_OFF_N; + tmp |= EC7_WWAN_PWR_OFF_N | EC7_WL_RADIO_DIS_N; printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_7_ADDR, tmp); ec_write(EC_GPIO_7_ADDR, tmp);
tmp = ec_read(EC_GPIO_9_ADDR); - tmp |= EC9_CAM0_PWR_EN | EC9_CAM1_PWR_EN | EC9_WWAN_RST | EC9_TPM_PWR_EN | EC9_DT_PWREN; + tmp &= ~EC9_WWAN_RST_N; + tmp |= EC9_CAM0_PWR_EN | EC9_CAM1_PWR_EN | EC9_TPM_PWR_EN | EC9_SSD1_PWREN; printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_9_ADDR, tmp); ec_write(EC_GPIO_9_ADDR, tmp);
@@ -138,10 +138,10 @@ printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_A_ADDR, tmp); ec_write(EC_GPIO_A_ADDR, tmp);
- tmp = ec_read(EC_GPIO_C_ADDR); - tmp |= ECC_TPNL_BUF_EN | ECC_TPAD_BUF_EN | ECC_NFC_BUF_EN; - printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_C_ADDR, tmp); - ec_write(EC_GPIO_C_ADDR, tmp); + tmp = ec_read(EC_GPIO_6_ADDR); + tmp |= EC6_TPNL_BUF_EN | EC6_TPAD_BUF_EN; + printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_6_ADDR, tmp); + ec_write(EC_GPIO_6_ADDR, tmp);
tmp = ec_read(EC_GPIO_D_ADDR); tmp |= ECD_TPNL_PWR_EN | ECD_TPNL_EN | ECD_TPAD_DISABLE_N; @@ -149,40 +149,36 @@ ec_write(EC_GPIO_D_ADDR, tmp);
tmp = ec_read(EC_GPIO_E_ADDR); - tmp |= ECE_LOM_PWR_EN | ECE_SSD0_PWR_EN | ECE_SD_PWR_EN; + tmp |= ECE_LOM_PWR_EN | ECE_SSD0_PWR_EN | ECE_SD_PWR_EN | ECE_WLAN_PWR_EN | ECE_WWAN_PWR_EN; tmp |= ECE_CAM_PWR_EN | ECE_FPR_N_GBE_SEL; tmp &= ~ECE_BT_N_TPNL_SEL; if (CONFIG(WLAN01_BIRMANPLUS)) { // no WWAN, turn off WWAN power tmp &= ~ECE_WWAN_PWR_EN; - } else { - tmp |= ECE_WWAN_PWR_EN; } - if (CONFIG(WWAN01_BIRMANPLUS)) { // no WLAN, turn off WLAN power + + if (CONFIG(DISABLE_WLAN_SD_BIRMANPLUS)) { // no WLAN, turn off WLAN power tmp &= ~ECE_WLAN_PWR_EN; - } else { - tmp |= ECE_WLAN_PWR_EN; } + printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_E_ADDR, tmp); ec_write(EC_GPIO_E_ADDR, tmp);
tmp = ec_read(EC_GPIO_F_ADDR); - if (CONFIG(WLAN01_BIRMANPLUS)) { - tmp |= ECF_WWAN0_N_WLAN1_SW; - } else { - tmp &= ~ECF_WWAN0_N_WLAN1_SW; + tmp |= ECF_GBE_N_WWAN1_SW | ECF_SDE_N_WLAN1_SW; // Default SDCard x1 WLAN x1 and GBE x1 WWAN x1 + + if (CONFIG(ENABLE_WLAN02_BIRMANPLUS)) { + tmp &= ~ECF_GBE_N_WWAN1_SW; // Enable x2 WLAN, SD disable } - if (CONFIG(WWAN01_BIRMANPLUS)) { - tmp |= ECF_WLAN0_N_WWAN1_SW; - } else { - tmp &= ~ECF_WLAN0_N_WWAN1_SW; + + if (CONFIG(ENABLE_WWAN02_BIRMANPLUS)) { + tmp &= ~ECF_SDE_N_WLAN1_SW; // Enable x2 WWAN, GBE disable } printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_F_ADDR, tmp); ec_write(EC_GPIO_F_ADDR, tmp);
- tmp = ec_read(EC_GPIO_G_ADDR); - tmp &= ~ECG_DT_SSD1_MUX_OFF; - tmp &= ~ECG_WLAN_WWAN_MUX_OFF; - tmp |= ECG_IR_LED_PWR_EN | ECG_U0_WLAN_HDR_SEL; + tmp = ec_read(EC_GPIO_G_ADDR); + tmp &= ~ECG_WLAN_WWAN_MUX_OFF; // Keep low to avoid GPP13, GPP14 not work. + tmp |= ECG_IR_LED_PWR_EN | ECG_U0_WLAN_HDR_SEL | ECG_NFC_BUF_EN; printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_G_ADDR, tmp); ec_write(EC_GPIO_G_ADDR, tmp); }
-
Ana Carolina Cabral (Code Review)