Change in coreboot[master]: soc/intel/common: Enable rom cache on all CPU threads

[Kane Chen (Code Review)]

Attention is currently required from: Arthur Heymans.
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63486 )

Change subject: soc/intel/common: Enable rom cache on all CPU threads
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Patch Set 2:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/63486/comment/22051300_a404346b 
PS2, Line 11: However the BSP doesn't wait all threads to finish _x86_setup_mtrrs
> I think it's better to fix this than to program something temporary on APs too. […]

appreciate your suggestion:)
let me do some experiments .

Patchset:

PS2:
> Is restoring the temp mtrr also done APs. I thought it didn't.

ah yes, thanks for capturing this.
i miss this.
it only restores BSP MTRR.