Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28827
Change subject: Documentation: Spell "blob" in lowercase ......................................................................
Documentation: Spell "blob" in lowercase
It's not an acronym (outside of database software).
Change-Id: I529561e4fc9889be7f9d6bd6d5f9a876e2007671 Signed-off-by: Jonathan Neuschäfer j.neuschaefer@gmx.net --- M Documentation/mainboard/lenovo/xx20_series.md M Documentation/mainboard/lenovo/xx30_series.md M Documentation/northbridge/intel/sandybridge/nri_features.md 3 files changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/28827/1
diff --git a/Documentation/mainboard/lenovo/xx20_series.md b/Documentation/mainboard/lenovo/xx20_series.md index 976a29b..8603853 100644 --- a/Documentation/mainboard/lenovo/xx20_series.md +++ b/Documentation/mainboard/lenovo/xx20_series.md @@ -26,8 +26,8 @@ * Do **NOT** accidently swap pins or power on the board while a SPI flasher is connected. It will destroy your device. * It's recommended to only flash the BIOS region. In that case you don't - need to extract BLOBs from vendor firmware. - If you want to flash the whole chip, you need BLOBs when building + need to extract blobs from vendor firmware. + If you want to flash the whole chip, you need blobs when building coreboot. * The shipped *Flash layout* allocates 3MiB to the BIOS region, which is the space usable by coreboot. diff --git a/Documentation/mainboard/lenovo/xx30_series.md b/Documentation/mainboard/lenovo/xx30_series.md index e65a3f2..ad85605 100644 --- a/Documentation/mainboard/lenovo/xx30_series.md +++ b/Documentation/mainboard/lenovo/xx30_series.md @@ -26,8 +26,8 @@ * Do **NOT** accidently swap pins or power on the board while a SPI flasher is connected. It will permanently brick your device. * It's recommended to only flash the BIOS region. In that case you don't - need to extract BLOBs from vendor firmware. - If you want to flash the whole chip, you need BLOBs when building + need to extract blobs from vendor firmware. + If you want to flash the whole chip, you need blobs when building coreboot. * The *Flash layout* shows that by default 7MiB of space are available for the use with coreboot. diff --git a/Documentation/northbridge/intel/sandybridge/nri_features.md b/Documentation/northbridge/intel/sandybridge/nri_features.md index 51297bd..d700b54 100644 --- a/Documentation/northbridge/intel/sandybridge/nri_features.md +++ b/Documentation/northbridge/intel/sandybridge/nri_features.md @@ -8,7 +8,7 @@ * There might be errors to fix. * Position in romstage doesn't matter. 2. mrc.bin raminit - * Closed Source (aka BLOB) + * Closed Source (aka blob) * No known errors. * Needs to be placed at fixed offset in romstage.
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Jonathan Neuschäfer (Code Review)