[XS] Change in coreboot[master]: soc/intel/{adl, mtl}: Avoid redundant display init by joining to MBUS

[Subrata Banik (Code Review)]

Attention is currently required from: Eran Mitrani, Jakub Czapiga, Kapil Porwal, Tarun Tuli.

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76929?usp=email )

Change subject: soc/intel/{adl, mtl}: Avoid redundant display init by joining to MBUS
......................................................................

soc/intel/{adl, mtl}: Avoid redundant display init by joining to MBUS

This patch ensures that the IGD joins the MBUS when the firmware splash
screen feature is enabled. This prevents the i915 driver from
reinitializing the display, which can save up to 75ms-80ms of boot time
and eliminate a brief period of blank screen between the firmware splash
screen and the OS login prompt.

BUG=b:284799726
TEST=Able to build and boot google/rex

Change-Id: I36af167afa902053a987602d494a8830ad9b1b1a
Signed-off-by: Subrata Banik 
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/meteorlake/Kconfig
2 files changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/76929/1

diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index c9845ad..4b316fd 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -133,6 +133,7 @@
    select SOC_INTEL_COMMON_RESET
    select SOC_INTEL_CSE_SEND_EOP_LATE if !BOARD_GOOGLE_BRYA_COMMON
    select SOC_INTEL_CSE_SET_EOP
+	select SOC_INTEL_GFX_MBUS_JOIN if HAVE_FSP_LOGO_SUPPORT
    select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
    select HAVE_INTEL_COMPLIANCE_TEST_MODE
    select SSE2
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 8f4e3a2..94cd4aa 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -85,6 +85,7 @@
    select SOC_INTEL_COMMON_BLOCK_IOC
    select SOC_INTEL_CSE_SEND_EOP_LATE if !MAINBOARD_HAS_CHROMEOS
    select SOC_INTEL_CSE_SET_EOP
+	select SOC_INTEL_GFX_MBUS_JOIN if HAVE_FSP_LOGO_SUPPORT
    select SOC_INTEL_GFX_NON_PREFETCHABLE_MMIO
    select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
    select SSE2