Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48667 )
Change subject: mb/amd/mandolin/mainboard: Remove unused pirq_data ......................................................................
mb/amd/mandolin/mainboard: Remove unused pirq_data
This table was wrong. It's also produced by the SoC now.
BUG=b:170595019 TEST=None
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ifcc406591abf88ebdb5ed972614c3a6901721bac --- M src/mainboard/amd/mandolin/mainboard.c 1 file changed, 0 insertions(+), 27 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/48667/1
diff --git a/src/mainboard/amd/mandolin/mainboard.c b/src/mainboard/amd/mandolin/mainboard.c index b509282..0d208da 100644 --- a/src/mainboard/amd/mandolin/mainboard.c +++ b/src/mainboard/amd/mandolin/mainboard.c @@ -29,30 +29,6 @@ _Static_assert(sizeof(fch_pic_routing) == sizeof(fch_apic_routing), "PIC and APIC FCH interrupt tables must be the same size");
-/* - * This table doesn't actually perform any routing. It only populates the - * PCI_INTERRUPT_LINE register on the PCI device with the PIC value specified - * in fch_apic_routing. The linux kernel only looks at this field as a backup - * if ACPI routing fails to describe the PCI routing correctly. The linux kernel - * also uses the APIC by default, so the value coded into the registers will be - * wrong. - * - * This table is also confusing because PCI Interrupt routing happens at the - * device/slot level, not the function level. - */ -static const struct pirq_struct mainboard_pirq_data[] = { - { PCIE_GPP_0_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_1_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_2_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_3_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_4_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_5_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_6_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_A_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_B_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { SMBUS_DEVFN, { PIRQ_SMBUS, PIRQ_NC, PIRQ_NC, PIRQ_NC } }, -}; - static const struct fch_irq_routing { uint8_t intr_index; uint8_t pic_irq_num; @@ -100,9 +76,6 @@ static void pirq_setup(void) { init_tables(); - - pirq_data_ptr = mainboard_pirq_data; - pirq_data_size = ARRAY_SIZE(mainboard_pirq_data); intr_data_ptr = fch_apic_routing; picr_data_ptr = fch_pic_routing; }
Nikolai Vyssotski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48667 )
Change subject: mb/amd/mandolin/mainboard: Remove unused pirq_data ......................................................................
Patch Set 1: Code-Review+1
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48667 )
Change subject: mb/amd/mandolin/mainboard: Remove unused pirq_data ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48667 )
Change subject: mb/amd/mandolin/mainboard: Remove unused pirq_data ......................................................................
Patch Set 1: Code-Review+2
Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Angel Pons, Nikolai Vyssotski, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48667
to look at the new patch set (#2).
Change subject: mb/amd/mandolin/mainboard: Remove unused pirq_data ......................................................................
mb/amd/mandolin/mainboard: Remove unused pirq_data
This table was wrong. It's also produced by the SoC code now.
BUG=b:170595019 TEST=None
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ifcc406591abf88ebdb5ed972614c3a6901721bac --- M src/mainboard/amd/mandolin/mainboard.c 1 file changed, 0 insertions(+), 27 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/48667/2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48667 )
Change subject: mb/amd/mandolin/mainboard: Remove unused pirq_data ......................................................................
mb/amd/mandolin/mainboard: Remove unused pirq_data
This table was wrong. It's also produced by the SoC code now.
BUG=b:170595019 TEST=None
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ifcc406591abf88ebdb5ed972614c3a6901721bac Reviewed-on: https://review.coreboot.org/c/coreboot/+/48667 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nikolai Vyssotski nikolai.vyssotski@amd.corp-partner.google.com Reviewed-by: Felix Held felix-coreboot@felixheld.de Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/amd/mandolin/mainboard.c 1 file changed, 0 insertions(+), 27 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Angel Pons: Looks good to me, approved Nikolai Vyssotski: Looks good to me, but someone else must approve
diff --git a/src/mainboard/amd/mandolin/mainboard.c b/src/mainboard/amd/mandolin/mainboard.c index b509282..0d208da 100644 --- a/src/mainboard/amd/mandolin/mainboard.c +++ b/src/mainboard/amd/mandolin/mainboard.c @@ -29,30 +29,6 @@ _Static_assert(sizeof(fch_pic_routing) == sizeof(fch_apic_routing), "PIC and APIC FCH interrupt tables must be the same size");
-/* - * This table doesn't actually perform any routing. It only populates the - * PCI_INTERRUPT_LINE register on the PCI device with the PIC value specified - * in fch_apic_routing. The linux kernel only looks at this field as a backup - * if ACPI routing fails to describe the PCI routing correctly. The linux kernel - * also uses the APIC by default, so the value coded into the registers will be - * wrong. - * - * This table is also confusing because PCI Interrupt routing happens at the - * device/slot level, not the function level. - */ -static const struct pirq_struct mainboard_pirq_data[] = { - { PCIE_GPP_0_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_1_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_2_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_3_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_4_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_5_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_6_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_A_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { PCIE_GPP_B_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, - { SMBUS_DEVFN, { PIRQ_SMBUS, PIRQ_NC, PIRQ_NC, PIRQ_NC } }, -}; - static const struct fch_irq_routing { uint8_t intr_index; uint8_t pic_irq_num; @@ -100,9 +76,6 @@ static void pirq_setup(void) { init_tables(); - - pirq_data_ptr = mainboard_pirq_data; - pirq_data_size = ARRAY_SIZE(mainboard_pirq_data); intr_data_ptr = fch_apic_routing; picr_data_ptr = fch_pic_routing; }