build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25811 )
Change subject: [WIP] soc/intel/cannonlake: Use bootblock common stage ......................................................................
Patch Set 5:
(6 comments)
https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/b... File src/soc/intel/cannonlake/bootblock/bootblock.c:
https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/b... PS5, Line 51: #define TCOEN (1 << 1) /* Enable TCO I/O range decode. */ line over 80 characters
https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/b... PS5, Line 127: if (pmc_reg_value != 0xFFFFFFFF) that open brace { should be on the previous line
https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/r... File src/soc/intel/cannonlake/bootblock/report_platform.c:
https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/r... PS5, Line 55: const struct cpu_info* soc_get_cpu_id_table(void) "foo* bar" should be "foo *bar"
https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/r... PS5, Line 60: const struct mch_info* soc_get_mch_id_table(void) "foo* bar" should be "foo *bar"
https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/r... PS5, Line 65: const struct pch_info* soc_get_pch_id_table(void) "foo* bar" should be "foo *bar"
https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/r... PS5, Line 70: const struct igd_info* soc_get_igd_id_table(void) "foo* bar" should be "foo *bar"