Change in coreboot[master]: [WIP] mb/google/volteer: Update flashmap descriptor to add CSE RW binary

[Jamie Ryu (Code Review)]

Jamie Ryu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46431 )

Change subject: [WIP] mb/google/volteer: Update flashmap descriptor to add CSE RW binary
......................................................................

[WIP] mb/google/volteer: Update flashmap descriptor to add CSE RW binary

BUG=b:166982406
TEST=build with cse rw binary and verify volteer boot time is close
to 1 sec.

Signed-off-by: Jamie Ryu 
Change-Id: I87da3824933ed2dd8e8ed0fed8686d2a3527faea
---
M src/mainboard/google/volteer/chromeos.fmd
1 file changed, 6 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/46431/1

diff --git a/src/mainboard/google/volteer/chromeos.fmd b/src/mainboard/google/volteer/chromeos.fmd
old mode 100644
new mode 100755
index 07a5464..246561d
--- a/src/mainboard/google/volteer/chromeos.fmd
+++ b/src/mainboard/google/volteer/chromeos.fmd
@@ -10,13 +10,15 @@
    	RW_LEGACY(CBFS)@0x0 0xb00000
    	RW_SECTION_A@0xb00000 0x5e0000 {
    		VBLOCK_A@0x0 0x10000
-			FW_MAIN_A(CBFS)@0x10000 0x5cffc0
-			RW_FWID_A@0x5dffc0 0x40
+			FW_MAIN_A(CBFS)@0x10000 0x34ffc0
+			RW_FWID_A@0x35ffc0 0x40
+			FW_MAIN_A_EXTN(CBFS)@0x360000 0x280000
    	}
    	RW_SECTION_B@0x10e0000 0x5e0000 {
    		VBLOCK_B@0x0 0x10000
-			FW_MAIN_B(CBFS)@0x10000 0x5cffc0
-			RW_FWID_B@0x5dffc0 0x40
+			FW_MAIN_B(CBFS)@0x10000 0x34ffc0
+			RW_FWID_B@0x35ffc0 0x40
+			FW_MAIN_B_EXTN(CBFS)@0x360000 0x280000
    	}
    	RW_MISC@0x16c0000 0x40000 {
    		UNIFIED_MRC_CACHE(PRESERVE)@0x0 0x30000 {

Change in coreboot[master]: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

[Jamie Ryu (Code Review)]

Hello build bot (Jenkins), Jamie Ryu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46431

to look at the new patch set (#3).

Change subject: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region
......................................................................

mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

The current CSE firmware update implementation adds CSE RW binary to
FW_MAIN_A/B and this increases the boot time due to the size increase
of these regions leading to higher loading and hashing time.

To mitigate this issue, CSE RW binary is moved from FW_MAIN_A/B to new
region, ME_RW_A/B under RW_SECTON_A/B, and this updates the flashmap to
add ME_RW_A/B region for CSE RW binary.

BUG=b:166982406
TEST=build with cse rw binary and verify volteer boot time is close
to 1 sec.

Signed-off-by: Jamie Ryu 
Change-Id: I87da3824933ed2dd8e8ed0fed8686d2a3527faea
---
M src/mainboard/google/volteer/chromeos.fmd
1 file changed, 6 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/46431/3

Change in coreboot[master]: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

[Jamie Ryu (Code Review)]

Hello build bot (Jenkins), Jamie Ryu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46431

to look at the new patch set (#4).

Change subject: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region
......................................................................

mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

The current CSE firmware update implementation adds CSE RW binary to
FW_MAIN_A/B and this increases the boot time due to the size increase
of these regions leading to higher loading and hashing time.

To mitigate this issue, CSE RW binary is moved from FW_MAIN_A/B to new
region, ME_RW_A/B under RW_SECTON_A/B, and this updates the flashmap to
add ME_RW_A/B region for CSE RW binary.

BUG=b:166982406
TEST=build with cse rw binary and verify volteer boot time is close
to 1 sec.

Signed-off-by: Jamie Ryu 
Change-Id: I87da3824933ed2dd8e8ed0fed8686d2a3527faea
---
M src/mainboard/google/volteer/chromeos.fmd
1 file changed, 6 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/46431/4

Change in coreboot[master]: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

[Jamie Ryu (Code Review)]

Hello build bot (Jenkins), Jamie Ryu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46431

to look at the new patch set (#5).

Change subject: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region
......................................................................

mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

The current CSE firmware update implementation adds CSE RW binary to
FW_MAIN_A/B and this increases the boot time due to the size increase
of these regions leading to higher loading and hashing time.

To mitigate this issue, CSE RW binary is moved from FW_MAIN_A/B to new
region, ME_RW_A/B under RW_SECTON_A/B, and this updates the flashmap to
add ME_RW_A/B region for CSE RW binary.

BUG=b:169077783
TEST=build with cse rw binary and verify volteer boot time is close
to 1 sec.

Signed-off-by: Jamie Ryu 
Change-Id: I87da3824933ed2dd8e8ed0fed8686d2a3527faea
---
M src/mainboard/google/volteer/chromeos.fmd
1 file changed, 6 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/46431/5

Change in coreboot[master]: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46431 )

Change subject: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region
......................................................................

Patch Set 7: Code-Review+1

I haven't looked at the size of CSE RW binary on volteer. I will let Nick/Tim +2 this.

Change in coreboot[master]: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46431 )

Change subject: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region
......................................................................

Patch Set 7:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46431/7/src/mainboard/google/voltee... 
File src/mainboard/google/volteer/chromeos.fmd:

https://review.coreboot.org/c/coreboot/+/46431/7/src/mainboard/google/voltee... 
PS7, Line 15: 0x280000
Is there any growth anticipated in the size of the ME RW binary? Just noting here that we would have about 268 KiB free space left in ME_RW_A/_B with this change, whereas we'll have about 1.5MiB left in each FW_MAIN_A/_B section, so there's some room you could borrow from for future growth.

Change in coreboot[master]: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

[Jamie Ryu (Code Review)]

Jamie Ryu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46431 )

Change subject: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region
......................................................................

Patch Set 8:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46431/7/src/mainboard/google/voltee... 
File src/mainboard/google/volteer/chromeos.fmd:

https://review.coreboot.org/c/coreboot/+/46431/7/src/mainboard/google/voltee... 
PS7, Line 15: 0x280000
> Is there any growth anticipated in the size of the ME RW binary? Just noting here that we would have […]

Hi Tim, ME_RW binary size depends on the FW sub-partition sizes that are configured in fit_config xml file and the number of FWs stitched to ME. The FW sub-partition sizes are currently finalized, so we don't expect any change or big increase; hence, may I ask there is any plan to integrate/stitch more FW ingredients (i.e. ish or ipu) to ME for any volteer variants? Thanks.

Change in coreboot[master]: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

[Jamie Ryu (Code Review)]

Hello V Sowmya, build bot (Jenkins), Shaunak Saha, Furquan Shaikh, Jamie Ryu, Tim Wawrzynczak, Rizwan Qureshi, Nick Vaccaro, Sridhar Siricilla, Raj Astekar,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46431

to look at the new patch set (#9).

Change subject: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region
......................................................................

mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

The current CSE firmware update implementation adds CSE RW binary to
FW_MAIN_A/B and this increases the boot time due to the size increase
of these regions leading to higher loading and hashing time.

To mitigate this issue, CSE RW binary is moved from FW_MAIN_A/B to new
region, ME_RW_A/B under RW_SECTON_A/B, and this updates the flashmap to
add ME_RW_A/B region for CSE RW binary.

BUG=b:169077783
TEST=build with cse rw binary, flash and verify volteer2 boots to OS.
Verify me_rw binary is added to ME_RW_A/B region.

Signed-off-by: Jamie Ryu 
Change-Id: I87da3824933ed2dd8e8ed0fed8686d2a3527faea
---
M src/mainboard/google/volteer/chromeos.fmd
1 file changed, 6 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/46431/9

Change in coreboot[master]: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

[Jamie Ryu (Code Review)]

Jamie Ryu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46431 )

Change subject: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region
......................................................................

Patch Set 10: Code-Review+1

After having an internal discussion and reviewing comments from Tim, ME_RW_A and ME_RW_B size is increased by 0x20000, 128KB to give more room for me_rw binary.

Change in coreboot[master]: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

[Jamie Ryu (Code Review)]

Jamie Ryu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46431 )

Change subject: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region
......................................................................

Patch Set 10:

(1 comment)
> Patch Set 10: Code-Review+1
>
> After having an internal discussion and reviewing comments from Tim, ME_RW_A and ME_RW_B size is increased by 0x20000, 128KB to give more room for me_rw binary.

https://review.coreboot.org/c/coreboot/+/46431/7/src/mainboard/google/voltee... 
File src/mainboard/google/volteer/chromeos.fmd:

https://review.coreboot.org/c/coreboot/+/46431/7/src/mainboard/google/voltee... 
PS7, Line 15: 0x280000
> Hi Tim, ME_RW binary size depends on the FW sub-partition sizes that are configured in fit_config xm […]

After having an internal discussion and reviewing comments from Tim, ME_RW_A and ME_RW_B size is increased by 0x20000, 128KB to give more room for me_rw binary. Please let me know if you have any comments. Thanks.

Change in coreboot[master]: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46431 )

Change subject: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region
......................................................................

Patch Set 10: Code-Review+2

Change in coreboot[master]: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46431 )

Change subject: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region
......................................................................

Patch Set 10: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/46431/7/src/mainboard/google/voltee... 
File src/mainboard/google/volteer/chromeos.fmd:

https://review.coreboot.org/c/coreboot/+/46431/7/src/mainboard/google/voltee... 
PS7, Line 15: 0x280000
> After having an internal discussion and reviewing comments from Tim, ME_RW_A and ME_RW_B size is inc […]

Thanks, Jamie. We are adding IPU bootloader FW.

Change in coreboot[master]: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

[Furquan Shaikh (Code Review)]

Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46431 )

Change subject: mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region
......................................................................

mb/google/volteer: Update flashmap descriptor to add ME_RW_A/B region

The current CSE firmware update implementation adds CSE RW binary to
FW_MAIN_A/B and this increases the boot time due to the size increase
of these regions leading to higher loading and hashing time.

To mitigate this issue, CSE RW binary is moved from FW_MAIN_A/B to new
region, ME_RW_A/B under RW_SECTON_A/B, and this updates the flashmap to
add ME_RW_A/B region for CSE RW binary.

BUG=b:169077783
TEST=build with cse rw binary, flash and verify volteer2 boots to OS.
Verify me_rw binary is added to ME_RW_A/B region.

Signed-off-by: Jamie Ryu 
Change-Id: I87da3824933ed2dd8e8ed0fed8686d2a3527faea
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46431
Reviewed-by: Furquan Shaikh 
Reviewed-by: Tim Wawrzynczak 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/volteer/chromeos.fmd
1 file changed, 6 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved
  Tim Wawrzynczak: Looks good to me, approved
  Jamie Ryu: Looks good to me, but someone else must approve

diff --git a/src/mainboard/google/volteer/chromeos.fmd b/src/mainboard/google/volteer/chromeos.fmd
index 07a5464..64776fe 100644
--- a/src/mainboard/google/volteer/chromeos.fmd
+++ b/src/mainboard/google/volteer/chromeos.fmd
@@ -10,13 +10,15 @@
    	RW_LEGACY(CBFS)@0x0 0xb00000
    	RW_SECTION_A@0xb00000 0x5e0000 {
    		VBLOCK_A@0x0 0x10000
-			FW_MAIN_A(CBFS)@0x10000 0x5cffc0
-			RW_FWID_A@0x5dffc0 0x40
+			FW_MAIN_A(CBFS)@0x10000 0x32ffc0
+			RW_FWID_A@0x33ffc0 0x40
+			ME_RW_A(CBFS)@0x340000 0x2a0000
    	}
    	RW_SECTION_B@0x10e0000 0x5e0000 {
    		VBLOCK_B@0x0 0x10000
-			FW_MAIN_B(CBFS)@0x10000 0x5cffc0
-			RW_FWID_B@0x5dffc0 0x40
+			FW_MAIN_B(CBFS)@0x10000 0x32ffc0
+			RW_FWID_B@0x33ffc0 0x40
+			ME_RW_B(CBFS)@0x340000 0x2a0000
    	}
    	RW_MISC@0x16c0000 0x40000 {
    		UNIFIED_MRC_CACHE(PRESERVE)@0x0 0x30000 {